/qemu/target/hppa/ |
H A D | gdbstub.c | 33 uint32_t val; in hppa_cpu_gdb_read_register() local 40 val = env->gr[n]; in hppa_cpu_gdb_read_register() 46 val = env->iaoq_f; in hppa_cpu_gdb_read_register() 52 val = env->iaoq_b; in hppa_cpu_gdb_read_register() 115 val = env->cr[24]; in hppa_cpu_gdb_read_register() 118 val = env->cr[25]; in hppa_cpu_gdb_read_register() 121 val = env->cr[26]; in hppa_cpu_gdb_read_register() 140 val = 0; in hppa_cpu_gdb_read_register() 160 env->gr[n] = val; in hppa_cpu_gdb_write_register() 167 val |= PRIV_USER; in hppa_cpu_gdb_write_register() [all …]
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H A D | op_helper.c | 104 cpu_stb_data_ra(env, addr, val, ra); in do_stby_b() 107 cpu_stw_data_ra(env, addr, val, ra); in do_stby_b() 119 cpu_stl_data_ra(env, addr, val, ra); in do_stby_b() 129 cpu_stb_data_ra(env, addr, val, ra); in do_stdby_b() 132 cpu_stw_data_ra(env, addr, val, ra); in do_stdby_b() 144 cpu_stl_data_ra(env, addr, val, ra); in do_stdby_b() 175 cpu_stq_data_ra(env, addr, val, ra); in do_stdby_b() 182 do_stby_b(env, addr, val, false, GETPC()); in HELPER() 186 target_ulong val) in HELPER() 188 do_stby_b(env, addr, val, true, GETPC()); in HELPER() [all …]
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H A D | machine.c | 51 uint64_t val; in get_tlb() local 58 if (val) { in get_tlb() 81 val = 1; in put_tlb() 82 val = deposit64(val, 61, 1, ent->t); in put_tlb() 83 val = deposit64(val, 60, 1, ent->d); in put_tlb() 84 val = deposit64(val, 59, 1, ent->b); in put_tlb() 85 val = deposit64(val, 56, 3, ent->ar_type); in put_tlb() 86 val = deposit64(val, 54, 2, ent->ar_pl1); in put_tlb() 87 val = deposit64(val, 52, 2, ent->ar_pl2); in put_tlb() 88 val = deposit64(val, 51, 1, ent->u); in put_tlb() [all …]
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/qemu/util/ |
H A D | lockcnt.c | 119 val = qatomic_cmpxchg(&lockcnt->count, val, in qemu_lockcnt_inc() 162 val = qatomic_cmpxchg(&lockcnt->count, val, in qemu_lockcnt_dec_and_lock() 246 while (!qemu_lockcnt_cmpxchg_or_wait(lockcnt, &val, val + step, &waited)) { in qemu_lockcnt_lock() 262 expected = val; in qemu_lockcnt_inc_and_unlock() 265 val = qatomic_cmpxchg(&lockcnt->count, val, new); in qemu_lockcnt_inc_and_unlock() 280 expected = val; in qemu_lockcnt_unlock() 283 val = qatomic_cmpxchg(&lockcnt->count, val, new); in qemu_lockcnt_unlock() 337 while (val > 1) { in qemu_lockcnt_dec_and_lock() 338 int old = qatomic_cmpxchg(&lockcnt->count, val, val - 1); in qemu_lockcnt_dec_and_lock() 340 val = old; in qemu_lockcnt_dec_and_lock() [all …]
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/qemu/target/i386/tcg/sysemu/ |
H A D | misc_helper.c | 68 target_ulong val; in helper_read_crN() local 82 return val; in helper_read_crN() 143 uint64_t val; in helper_wrmsr() local 205 env->pat = val; in helper_wrmsr() 290 && (val == 0 || val == ~(uint64_t)0)) { in helper_wrmsr() 325 || (val == 0 || val == ~(uint64_t)0)) { in helper_wrmsr() 341 uint64_t val; in helper_rdmsr() local 375 val = 1000ULL; in helper_rdmsr() 455 val = 0; in helper_rdmsr() 465 val = 0; in helper_rdmsr() [all …]
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/qemu/hw/audio/ |
H A D | hda-codec-common.h | 80 .val = 1, 108 .val = 1, 146 .val = 0x00100101, 149 .val = 0x00010001, 163 .val = 0x00020002, 178 .val = 0, 184 .val = 0, 271 .val = 0, 277 .val = 0, 382 .val = 0, [all …]
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H A D | ac97.c | 304 return val; in mixer_load() 435 val &= 0xbf3f; in set_volume() 659 val = s->cas; in nabm_readb() 666 val = r->civ; in nabm_readb() 673 val = r->lvi; in nabm_readb() 680 val = r->piv; in nabm_readb() 687 val = r->cr; in nabm_readb() 701 return val; in nabm_readb() 715 val = r->sr; in nabm_readw() 729 return val; in nabm_readw() [all …]
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/qemu/hw/virtio/ |
H A D | virtio-config-io.c | 19 uint8_t val; in virtio_config_readb() local 28 return val; in virtio_config_readb() 34 uint16_t val; in virtio_config_readw() local 43 return val; in virtio_config_readw() 49 uint32_t val; in virtio_config_readl() local 58 return val; in virtio_config_readl() 112 uint8_t val; in virtio_config_modern_readb() local 121 return val; in virtio_config_modern_readb() 127 uint16_t val; in virtio_config_modern_readw() local 136 return val; in virtio_config_modern_readw() [all …]
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/qemu/hw/ide/ |
H A D | sii3112.c | 46 uint64_t val; in sii3112_reg_read() local 50 val = d->i.bmdma[0].cmd; in sii3112_reg_read() 53 val = d->regs[0].swdata; in sii3112_reg_read() 59 val = 0; in sii3112_reg_read() 65 val = d->i.bmdma[1].cmd; in sii3112_reg_read() 68 val = d->regs[1].swdata; in sii3112_reg_read() 74 val = 0; in sii3112_reg_read() 129 val = 0; in sii3112_reg_read() 133 return val; in sii3112_reg_read() 187 if (val & 1) { in sii3112_reg_write() [all …]
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/qemu/hw/i386/ |
H A D | intel_iommu_internal.h | 135 #define VTD_IVA_ADDR(val) ((val) & ~0xfffULL) argument 136 #define VTD_IVA_AM(val) ((val) & 0x3fULL) argument 172 #define VTD_CCMD_FM(val) (((val) >> 32) & 3ULL) argument 264 #define VTD_FRCD_FR(val) (((val) & 0xffULL) << 32) argument 266 #define VTD_FRCD_SID(val) ((val) & VTD_FRCD_SID_MASK) argument 268 #define VTD_FRCD_FI(val) ((val) & ~0xfffULL) argument 269 #define VTD_FRCD_PV(val) (((val) & 0xffffULL) << 40) argument 270 #define VTD_FRCD_PP(val) (((val) & 0x1) << 31) argument 271 #define VTD_FRCD_IR_IDX(val) (((val) & 0xffffULL) << 48) argument 395 #define VTD_INV_DESC_IOTLB_AM(val) ((val) & 0x3fULL) argument [all …]
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/qemu/hw/pci-host/ |
H A D | astro.c | 46 return val; in mask_32bit_val() 49 val >>= 32; in mask_32bit_val() 51 val = (uint32_t) val; in mask_32bit_val() 53 return val; in mask_32bit_val() 60 *p = val; in put_val_in_int64() 153 val = mask_32bit_val(addr, size, val); in elroy_chip_read_with_attrs() 156 *data = val; in elroy_chip_read_with_attrs() 200 val = le64_to_cpu(val); in elroy_chip_write_with_attrs() 236 uint64_t val; in elroy_config_data_read() local 241 return val; in elroy_config_data_read() [all …]
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H A D | mv64361.c | 242 val &= 0x1fffff; in set_mem_windows() 361 val |= BIT_ULL(n); in mv64361_update_irq() 363 val &= ~BIT_ULL(n); in mv64361_update_irq() 368 s->main_int_cr = val; in mv64361_update_irq() 615 warn_swap_bit(val); in mv64361_write() 628 warn_swap_bit(val); in mv64361_write() 643 warn_swap_bit(val); in mv64361_write() 658 warn_swap_bit(val); in mv64361_write() 673 warn_swap_bit(val); in mv64361_write() 790 s->gpp_io = val; in mv64361_write() [all …]
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H A D | ppc440_pcix.c | 188 s->pom[0].sa = val; in ppc440_pcix_reg_write4() 212 s->pom[1].sa = val; in ppc440_pcix_reg_write4() 226 s->pom[2].sa = val; in ppc440_pcix_reg_write4() 245 s->pim[1].sa = val; in ppc440_pcix_reg_write4() 275 s->sts = val; in ppc440_pcix_reg_write4() 301 uint32_t val; in ppc440_pcix_reg_read4() local 309 val = s->pom[0].la; in ppc440_pcix_reg_read4() 371 val = s->sts; in ppc440_pcix_reg_read4() 385 val = 0; in ppc440_pcix_reg_read4() 389 return val; in ppc440_pcix_reg_read4() [all …]
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H A D | trace-events | 25 sabre_config_write(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PRIx64 26 sabre_config_read(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PRIx64 27 sabre_pci_config_write(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PRIx64 28 sabre_pci_config_read(uint64_t addr, uint64_t val) "addr 0x%"PRIx64" val 0x%"PRIx64 36 unin_data_read(uint64_t addr, unsigned len, uint64_t val) "read addr 0x%"PRIx64 " len %d val 0x%"PR… 59 dino_chip_read(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x" 60 dino_chip_write(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x" 64 astro_chip_read(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64 65 astro_chip_write(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64 66 elroy_read(uint64_t addr, int size, uint64_t val) "addr 0x%"PRIx64" size %d val 0x%"PRIx64 [all …]
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/qemu/target/riscv/ |
H A D | csr.c | 996 *val = 0; in read_scountovf() 1229 *val = 0; in read_zero() 1348 val = set_field(val, MSTATUS_MPP, old_mpp); in legalize_mpp() 1351 return val; in legalize_mpp() 1487 if (!(val & RVI && val & RVM && val & RVA && in write_misa() 1488 val & RVF && val & RVD)) { in write_misa() 1746 if (val) { in rmw_xiselect() 1781 if (val) { in rmw_iprio() 3182 *val = set_field(*val, HSTATUS_VSXL, 2); in read_hstatus() 3185 *val = set_field(*val, HSTATUS_VSBE, 0); in read_hstatus() [all …]
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/qemu/hw/rtc/ |
H A D | ls7a_rtc.c | 115 uint64_t val = 0; in toy_time_to_val_mon() local 117 val = FIELD_DP32(val, TOY, MON, tm->tm_mon + 1); in toy_time_to_val_mon() 118 val = FIELD_DP32(val, TOY, DAY, tm->tm_mday); in toy_time_to_val_mon() 119 val = FIELD_DP32(val, TOY, HOUR, tm->tm_hour); in toy_time_to_val_mon() 120 val = FIELD_DP32(val, TOY, MIN, tm->tm_min); in toy_time_to_val_mon() 121 val = FIELD_DP32(val, TOY, SEC, tm->tm_sec); in toy_time_to_val_mon() 122 return val; in toy_time_to_val_mon() 217 int val = 0; in ls7a_rtc_read() local 226 val = 0; in ls7a_rtc_read() 268 val = 0; in ls7a_rtc_read() [all …]
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/qemu/include/fpu/ |
H A D | softfloat-helpers.h | 58 status->tininess_before_rounding = val; in set_float_detect_tininess() 61 static inline void set_float_rounding_mode(FloatRoundMode val, in set_float_rounding_mode() argument 64 status->float_rounding_mode = val; in set_float_rounding_mode() 69 status->float_exception_flags = val; in set_float_exception_flags() 75 status->floatx80_rounding_precision = val; in set_floatx80_rounding_precision() 80 status->flush_to_zero = val; in set_flush_to_zero() 85 status->flush_inputs_to_zero = val; in set_flush_inputs_to_zero() 90 status->default_nan_mode = val; in set_default_nan_mode() 95 status->snan_bit_is_one = val; in set_snan_bit_is_one() 100 status->use_first_nan = val; in set_use_first_nan() [all …]
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/qemu/target/m68k/ |
H A D | fpu_helper.c | 150 env->fpcr = val & 0xffff; in cpu_m68k_set_fpcr() 164 cpu_m68k_set_fpcr(env, val); in HELPER() 228 env->fpsr = val; in cpu_m68k_set_fpsr() 236 cpu_m68k_set_fpsr(env, val); in HELPER() 452 if (floatx80_is_neg(val->d)) { in HELPER() 456 if (floatx80_is_any_nan(val->d)) { in HELPER() 468 val->d = fpu_rom[offset]; in HELPER() 535 uint64_t val; in cpu_ld_float64_ra() local 537 val = cpu_ldq_data_ra(env, addr, ra); in cpu_ld_float64_ra() 546 float64 val; in cpu_st_float64_ra() local [all …]
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/qemu/target/ppc/ |
H A D | timebase_helper.c | 116 cpu_ppc_store_atbl(env, val); in helper_store_atbl() 121 cpu_ppc_store_atbu(env, val); in helper_store_atbu() 131 cpu_ppc_store_decr(env, val); in helper_store_decr() 197 store_40x_pit(env, val); in helper_store_40x_pit() 202 store_40x_tcr(env, val); in helper_store_40x_tcr() 207 store_40x_tsr(env, val); in helper_store_40x_tsr() 212 store_booke_tcr(env, val); in helper_store_booke_tcr() 217 store_booke_tsr(env, val); in helper_store_booke_tsr() 291 env->spr[SPR_TFMR] = val; in write_tfmr() 457 uint32_t val = 0; in helper_load_dcr() local [all …]
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/qemu/hw/isa/ |
H A D | trace-events | 10 pc87312_io_read(uint32_t addr, uint32_t val) "read addr=0x%x val=0x%x" 11 pc87312_io_write(uint32_t addr, uint32_t val) "write addr=0x%x val=0x%x" 14 apm_io_read(uint8_t addr, uint8_t val) "read addr=0x%x val=0x%02x" 15 apm_io_write(uint8_t addr, uint8_t val) "write addr=0x%x val=0x%02x" 18 via_isa_write(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%x" 19 via_pm_read(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%x" 20 via_pm_write(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%x" 21 via_pm_io_read(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%x" 22 via_pm_io_write(uint32_t addr, uint32_t val, int len) "addr 0x%x val 0x%x len 0x%x" 23 via_superio_read(uint8_t addr, uint8_t val) "addr 0x%x val 0x%x" [all …]
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/qemu/hw/misc/ |
H A D | lasi.c | 61 uint32_t val; in lasi_chip_read_with_attrs() local 65 val = s->irr; in lasi_chip_read_with_attrs() 68 val = s->imr; in lasi_chip_read_with_attrs() 71 val = s->ipr; in lasi_chip_read_with_attrs() 79 val = s->iar; in lasi_chip_read_with_attrs() 87 val = 0; in lasi_chip_read_with_attrs() 97 val = 0; in lasi_chip_read_with_attrs() 103 val = s->amr; in lasi_chip_read_with_attrs() 113 *data = val; in lasi_chip_read_with_attrs() 130 s->imr = val; in lasi_chip_write_with_attrs() [all …]
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/qemu/target/i386/hvf/ |
H A D | x86_emu.c | 132 target_ulong val; in read_val_from_reg() local 150 return val; in read_val_from_reg() 196 target_ulong val; in read_val_ext() local 221 return val; in read_val_ext() 317 int32_t val; in exec_neg() local 320 val = 0 - sign(decode->op[1].val, decode->operand_size); in exec_neg() 324 SET_FLAGS_OSZAPC_SUB32(env, 0, 0 - val, val); in exec_neg() 326 SET_FLAGS_OSZAPC_SUB16(env, 0, 0 - val, val); in exec_neg() 328 SET_FLAGS_OSZAPC_SUB8(env, 0, 0 - val, val); in exec_neg() 429 hvf_handle_io(env_cpu(env), decode->op[0].val, &val, 0, in exec_in() [all …]
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/qemu/hw/net/ |
H A D | lan9118.c | 545 uint32_t val; in lan9118_receive() local 578 val = 0; in lan9118_receive() 581 val = (val >> 8) | ((uint32_t)buf[src_pos] << 24); in lan9118_receive() 629 uint32_t val; in rx_fifo_pop() local 656 val = 0; in rx_fifo_pop() 666 val = 0; in rx_fifo_pop() 673 return val; in rx_fifo_pop() 728 return val; in rx_status_fifo_pop() 741 return val; in tx_status_fifo_pop() 1176 lan9118_eeprom_cmd(s, (val >> 28) & 7, val & 0x7f); in lan9118_writel() [all …]
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H A D | rtl8139.c | 1374 val = SET_MASKED(val, 0xe3, s->bChipCmdState); in rtl8139_ChipCmd_write() 1418 val = SET_MASKED(val, 0xff84, s->CpCmd); in rtl8139_CpCmd_write() 1480 val = SET_MASKED(val, mask, s->BasicModeCtrl); in rtl8139_BasicModeCtrl_write() 1524 val = SET_MASKED(val, 0x31, s->Cfg9346); in rtl8139_Cfg9346_write() 1580 val = SET_MASKED(val, 0xf8, s->Config0); in rtl8139_Config0_write() 1605 val = SET_MASKED(val, 0xC, s->Config1); in rtl8139_Config1_write() 1630 val = SET_MASKED(val, 0x8F, s->Config3); in rtl8139_Config3_write() 1655 val = SET_MASKED(val, 0x0a, s->Config4); in rtl8139_Config4_write() 1676 val = SET_MASKED(val, 0x80, s->Config5); in rtl8139_Config5_write() 2579 val = SET_MASKED(val, 0x1e00, s->IntrMask); in rtl8139_IntrMask_write() [all …]
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/qemu/hw/ppc/ |
H A D | pnv_nest_pervasive.c | 51 uint64_t val = ~0ull; in pnv_chiplet_ctrl_read() local 61 return val; in pnv_chiplet_ctrl_read() 67 val = nest_pervasive->control_regs.cplt_cfg0; in pnv_chiplet_ctrl_read() 76 val = nest_pervasive->control_regs.cplt_cfg1; in pnv_chiplet_ctrl_read() 85 val = nest_pervasive->control_regs.cplt_stat0; in pnv_chiplet_ctrl_read() 88 val = nest_pervasive->control_regs.cplt_mask0; in pnv_chiplet_ctrl_read() 100 return val; in pnv_chiplet_ctrl_read() 126 nest_pervasive->control_regs.cplt_cfg0 = val; in pnv_chiplet_ctrl_write() 129 nest_pervasive->control_regs.cplt_cfg0 |= val; in pnv_chiplet_ctrl_write() 135 nest_pervasive->control_regs.cplt_cfg1 = val; in pnv_chiplet_ctrl_write() [all …]
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