/qemu/include/qemu/ |
H A D | qemu-plugin.h | 377 enum qemu_plugin_op op, 435 enum qemu_plugin_op op, 660 enum qemu_plugin_op op,
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/qemu/disas/ |
H A D | mips.c | 4246 int op, delta; in print_insn_args() local 4799 if (op == OP_OP_COP0) in print_insn_args() 4942 for (op = mips_opcodes; op < &mips_opcodes[NUMOPCODES]; op++) in print_insn_mips() 4949 mips_hash[i] = op; in print_insn_mips() 4968 if (op != NULL) in print_insn_mips() 4970 for (; op < &mips_opcodes[NUMOPCODES]; op++) in print_insn_mips() 4974 && (word & op->mask) == op->match) in print_insn_mips() 5024 d = op->args; in print_insn_mips() 5182 for (op = mips16_opcodes; op < opend; op++) 5186 && (insn & op->mask) == op->match) [all …]
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H A D | riscv.h | 174 const int op; member 196 uint16_t op; member
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H A D | sparc.c | 1781 #define EFPOP1_2(name, op, args) { name, F3F(2, 0x36, op), F3F(~2, ~0x36, ~op)|RS1_G0, args, 0, spa… argument 1782 #define EFPOP1_3(name, op, args) { name, F3F(2, 0x36, op), F3F(~2, ~0x36, ~op), args, 0, spa… argument 1783 #define EFPOP2_2(name, op, args) { name, F3F(2, 0x37, op), F3F(~2, ~0x37, ~op)|RD_G0, args, 0, spa… argument 2410 sparc_opcode_hash *op; in is_delayed_branch() local 2412 for (op = opcode_hash_table[HASH_INSN (insn)]; op; op = op->next) in is_delayed_branch() 2414 const sparc_opcode *opcode = op->opcode; in is_delayed_branch() 2672 sparc_opcode_hash *op; in print_insn_sparc() local 2725 for (op = opcode_hash_table[HASH_INSN (insn)]; op; op = op->next) in print_insn_sparc() 2727 const sparc_opcode *opcode = op->opcode; in print_insn_sparc()
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/qemu/target/hexagon/ |
H A D | attribs_def.h.inc | 141 DEF_ATTRIB(ICOP, "Instruction cache op", "", "") 147 DEF_ATTRIB(ICFLUSHOP, "icflush op type", "", "") 148 DEF_ATTRIB(DCFLUSHOP, "dcflush op type", "", "") 149 DEF_ATTRIB(L2FLUSHOP, "l2flush op type", "", "") 168 DEF_ATTRIB(NOTE_VA_UNARY, "Combined with HVX ALU op (must be unary)", "", "")
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/qemu/target/mips/tcg/ |
H A D | mips16e_translate.c.inc | 459 int op, rx, ry, funct, sa; 463 op = (ctx->opcode >> 11) & 0x1f; 476 switch (op) { 659 int op, cnvt_op, op1, offset; 663 op = (ctx->opcode >> 11) & 0x1f; 673 switch (op) { 695 op = ((ctx->opcode >> 10) & 0x1) ? OPC_JALX : OPC_JAL; 696 gen_compute_branch(ctx, op, 4, rx, ry, offset, 2); 944 op = OPC_JALR; 946 op = OPC_JR; [all …]
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H A D | micromips_translate.c.inc | 624 #define uMIPS_RD(op) ((op >> 7) & 0x7) 625 #define uMIPS_RS(op) ((op >> 4) & 0x7) 626 #define uMIPS_RS2(op) uMIPS_RS(op) 627 #define uMIPS_RS1(op) ((op >> 1) & 0x7) 628 #define uMIPS_RD5(op) ((op >> 5) & 0x1f) 629 #define uMIPS_RS5(op) (op & 0x1f) 637 #define ZIMM(op, start, width) ((op >> start) & ((~0U) >> (32 - width))) 1640 switch (op) { 2670 /* Treat as no-op */ 2977 uint32_t op; [all …]
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/qemu/hw/ufs/ |
H A D | ufs.c | 918 if (!(flag_permission[idn] & op)) { in ufs_flag_check_idn_valid() 919 if (op == UFS_QUERY_FLAG_READ) { in ufs_flag_check_idn_valid() 979 if (!(attr_permission[idn] & op)) { in ufs_attr_check_idn_valid() 980 if (op == UFS_QUERY_ATTR_READ) { in ufs_attr_check_idn_valid() 998 ret = ufs_flag_check_idn_valid(idn, op); in ufs_exec_query_flag() 1005 } else if (op == UFS_QUERY_FLAG_READ) { in ufs_exec_query_flag() 1007 } else if (op == UFS_QUERY_FLAG_SET) { in ufs_exec_query_flag() 1009 } else if (op == UFS_QUERY_FLAG_CLEAR) { in ufs_exec_query_flag() 1011 } else if (op == UFS_QUERY_FLAG_TOGGLE) { in ufs_exec_query_flag() 1133 ret = ufs_attr_check_idn_valid(idn, op); in ufs_exec_query_attr() [all …]
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/qemu/tcg/ |
H A D | tcg-op.c | 43 op->args[0] = a1; in tcg_gen_op1() 49 op->args[0] = a1; in tcg_gen_op2() 50 op->args[1] = a2; in tcg_gen_op2() 56 op->args[0] = a1; in tcg_gen_op3() 57 op->args[1] = a2; in tcg_gen_op3() 58 op->args[2] = a3; in tcg_gen_op3() 64 op->args[0] = a1; in tcg_gen_op4() 65 op->args[1] = a2; in tcg_gen_op4() 66 op->args[2] = a3; in tcg_gen_op4() 67 op->args[3] = a4; in tcg_gen_op4() [all …]
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/qemu/hw/timer/ |
H A D | aspeed_timer.c | 68 static inline bool timer_ctrl_status(AspeedTimer *t, enum timer_ctrl_op op) in timer_ctrl_status() argument 70 return !!(timer_to_ctrl(t)->ctrl & BIT(t->id * TIMER_CTRL_BITS + op)); in timer_ctrl_status() 379 static void aspeed_timer_ctrl_op(AspeedTimer *t, enum timer_ctrl_op op, in aspeed_timer_ctrl_op() argument 382 const uint8_t mask = BIT(op); in aspeed_timer_ctrl_op() 388 ctrl_ops[op](t, enable); in aspeed_timer_ctrl_op()
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H A D | etraxfs_timer.c | 148 unsigned int op; in update_ctrl() local 167 op = ctrl & 3; in update_ctrl() 191 switch (op) in update_ctrl()
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/qemu/include/standard-headers/linux/ |
H A D | virtio_pcidev.h | 57 uint8_t op; member
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H A D | virtio_vsock.h | 63 uint16_t op; /* enum virtio_vsock_op */ member
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/qemu/linux-headers/linux/ |
H A D | iommufd.h | 311 __u16 op; member 348 __u16 op; member
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/qemu/include/sysemu/ |
H A D | block-backend-io.h | 53 BlockAIOCB *blk_aio_zone_mgmt(BlockBackend *blk, BlockZoneOp op, 199 int coroutine_fn blk_co_zone_mgmt(BlockBackend *blk, BlockZoneOp op, 201 int co_wrapper_mixed blk_zone_mgmt(BlockBackend *blk, BlockZoneOp op,
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H A D | block-backend-global-state.h | 93 bool blk_op_is_blocked(BlockBackend *blk, BlockOpType op, Error **errp); 94 void blk_op_unblock(BlockBackend *blk, BlockOpType op, Error *reason);
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/qemu/include/block/ |
H A D | block-global-state.h | 257 bdrv_op_is_blocked(BlockDriverState *bs, BlockOpType op, Error **errp); 259 void bdrv_op_block(BlockDriverState *bs, BlockOpType op, Error *reason); 260 void bdrv_op_unblock(BlockDriverState *bs, BlockOpType op, Error *reason);
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/qemu/target/hexagon/mmvec/ |
H A D | system_ext_mmvec.c | 40 env->vtcm_log.op = false; in mem_vector_scatter_init()
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H A D | mmvec.h | 70 bool op; member
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/qemu/libdecnumber/ |
H A D | decNumber.c | 4461 if (op&DIVIDE) { in decDivideOp() 4493 if (op&DIVIDE) { in decDivideOp() 4525 if (op&DIVIDEINT) { in decDivideOp() 4627 if (!(op&DIVIDE)) { in decDivideOp() 4763 if (op&DIVIDE) { in decDivideOp() 4851 if (op&REMNEAR) { in decDivideOp() 6226 op=COMPMAX; 6237 if (op==COMPMAXMAG || op==COMPMINMAG) result=decCompare(lhs, rhs, 1); 6243 if (op==COMPARE || op==COMPSIG ||op==COMPTOTAL) { /* returning signum */ 6270 op=COMPMAX; [all …]
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/qemu/plugins/ |
H A D | core.c | 315 static enum plugin_dyn_cb_type op_to_cb_type(enum qemu_plugin_op op) in op_to_cb_type() argument 317 switch (op) { in op_to_cb_type() 329 enum qemu_plugin_op op, in plugin_register_inline_op_on_entry() argument 339 dyn_cb->type = op_to_cb_type(op); in plugin_register_inline_op_on_entry()
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/qemu/docs/devel/ |
H A D | tcg-plugins.rst | 435 Instr: mrs x0, sp_el0 (2682661 hits) (op=0xd5384100/ System Reg) 436 Instr: mrs x1, tpidr_el2 (1789339 hits) (op=0xd53cd041/ System Reg) 437 Instr: mrs x2, tpidr_el2 (1513494 hits) (op=0xd53cd042/ System Reg) 438 Instr: mrs x0, tpidr_el2 (1490823 hits) (op=0xd53cd040/ System Reg) 439 Instr: mrs x1, sp_el0 (933793 hits) (op=0xd5384101/ System Reg) 440 Instr: mrs x2, sp_el0 (699516 hits) (op=0xd5384102/ System Reg) 441 Instr: mrs x4, tpidr_el2 (528437 hits) (op=0xd53cd044/ System Reg) 442 Instr: mrs x30, ttbr1_el1 (480776 hits) (op=0xd538203e/ System Reg) 443 Instr: msr ttbr1_el1, x30 (480713 hits) (op=0xd518203e/ System Reg) 444 Instr: msr vbar_el1, x30 (480671 hits) (op=0xd518c01e/ System Reg)
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/qemu/target/arm/tcg/ |
H A D | vfp.decode | 80 VMOV_64_sp ---- 1100 010 op:1 rt2:4 rt:4 1010 00.1 .... vm=%vm_sp 81 VMOV_64_dp ---- 1100 010 op:1 rt2:4 rt:4 1011 00.1 .... vm=%vm_dp 231 # We assemble bits 18 (op), 16 (u) and 7 (sx) into a single opc field
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/qemu/target/cris/ |
H A D | translate.c | 588 dc->cc_op = op; in cris_update_cc_op() 608 cris_update_cc_op(dc, op, size); in cris_pre_alu_update_cc() 611 if (op != CC_OP_MOVE in cris_pre_alu_update_cc() 612 && op != CC_OP_AND in cris_pre_alu_update_cc() 613 && op != CC_OP_OR in cris_pre_alu_update_cc() 614 && op != CC_OP_XOR in cris_pre_alu_update_cc() 615 && op != CC_OP_ASR in cris_pre_alu_update_cc() 616 && op != CC_OP_LSR in cris_pre_alu_update_cc() 617 && op != CC_OP_LSL) { in cris_pre_alu_update_cc() 638 switch (op) { in cris_alu_op_exec() [all …]
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/qemu/accel/tcg/ |
H A D | ldst_atomicity.c.inc | 393 * @memop: the full memory op 435 * @memop: the full memory op 480 * @memop: the full memory op 531 * @memop: the full memory op 856 * @memop: the full memory op 907 * @memop: the full memory op 974 * @memop: the full memory op 1039 * @memop: the full memory op
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