/openbsd/gnu/llvm/llvm/lib/Target/Hexagon/ |
H A D | HexagonInstrInfo.cpp | 118 void HexagonInstrInfo::anchor() {} in anchor() 120 HexagonInstrInfo::HexagonInstrInfo(HexagonSubtarget &ST) in HexagonInstrInfo() function in HexagonInstrInfo 386 bool HexagonInstrInfo::hasLoadFromStackSlot( in hasLoadFromStackSlot() 404 bool HexagonInstrInfo::hasStoreToStackSlot( in hasStoreToStackSlot() 730 const HexagonInstrInfo *TII; 1632 bool HexagonInstrInfo::reverseBranchCondition( in reverseBranchCondition() 1670 bool HexagonInstrInfo::PredicateInstruction( in PredicateInstruction() 4341 bool HexagonInstrInfo::getInvertedPredSense( in getInvertedPredSense() 4602 unsigned HexagonInstrInfo::nonDbgBundleSize( in nonDbgBundleSize() 4691 void HexagonInstrInfo:: [all …]
|
H A D | HexagonFrameLowering.h | 24 class HexagonInstrInfo; variable 116 void expandAlloca(MachineInstr *AI, const HexagonInstrInfo &TII, 133 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 136 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 139 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 142 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 145 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 148 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 151 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, 154 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII, [all …]
|
H A D | HexagonBitTracker.h | 18 class HexagonInstrInfo; variable 32 const HexagonInstrInfo &tii, MachineFunction &mf); 48 const HexagonInstrInfo &TII;
|
H A D | HexagonHazardRecognizer.h | 24 const HexagonInstrInfo *TII; 49 const HexagonInstrInfo *HII, in HexagonHazardRecognizer()
|
H A D | HexagonSubtarget.h | 87 bool shouldTFRICallBind(const HexagonInstrInfo &HII, 103 HexagonInstrInfo InstrInfo; 124 const HexagonInstrInfo *getInstrInfo() const override { return &InstrInfo; } in getInstrInfo() 352 bool isBestZeroLatency(SUnit *Src, SUnit *Dst, const HexagonInstrInfo *TII,
|
H A D | HexagonFixupHwLoops.cpp | 112 const HexagonInstrInfo *HII = in fixupLoopInstrs() 113 static_cast<const HexagonInstrInfo *>(MF.getSubtarget().getInstrInfo()); in fixupLoopInstrs()
|
H A D | HexagonVLIWPacketizer.h | 19 class HexagonInstrInfo; variable 76 const HexagonInstrInfo *HII;
|
H A D | HexagonISelDAGToDAG.h | 26 class HexagonInstrInfo; variable 31 const HexagonInstrInfo *HII;
|
H A D | HexagonSubtarget.cpp | 269 auto *QII = static_cast<const HexagonInstrInfo*>(DAG->TII); in apply() 303 const HexagonInstrInfo &HII, const SUnit &Inst1, in shouldTFRICallBind() 386 const auto &HII = static_cast<const HexagonInstrInfo&>(*DAG->TII); in apply() 447 const HexagonInstrInfo *QII = getInstrInfo(); in adjustSchedDependency() 550 auto &QII = static_cast<const HexagonInstrInfo &>(*getInstrInfo()); in updateLatency() 635 const HexagonInstrInfo *TII, SmallSet<SUnit*, 4> &ExclSrc, in isBestZeroLatency()
|
H A D | HexagonNewValueJump.cpp | 95 const HexagonInstrInfo *QII; 116 static bool canBeFeederToNewValueJump(const HexagonInstrInfo *QII, in INITIALIZE_PASS_DEPENDENCY() 237 static bool canCompareBeNewValueJump(const HexagonInstrInfo *QII, in canCompareBeNewValueJump() 459 QII = static_cast<const HexagonInstrInfo *>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
|
H A D | HexagonVectorPrint.cpp | 54 const HexagonInstrInfo *QII = nullptr; 98 const DebugLoc &DL, const HexagonInstrInfo *QII, in addAsmInstr()
|
H A D | HexagonPeephole.cpp | 82 const HexagonInstrInfo *QII; 113 QII = static_cast<const HexagonInstrInfo *>(MF.getSubtarget().getInstrInfo()); in runOnMachineFunction()
|
H A D | HexagonMachineScheduler.cpp | 28 const auto *QII = static_cast<const HexagonInstrInfo *>(TII); in hasDependence()
|
H A D | CMakeLists.txt | 40 HexagonInstrInfo.cpp
|
H A D | HexagonInstrInfo.h | 38 class HexagonInstrInfo : public HexagonGenInstrInfo { 48 explicit HexagonInstrInfo(HexagonSubtarget &ST);
|
H A D | HexagonBranchRelaxation.cpp | 69 const HexagonInstrInfo *HII;
|
H A D | HexagonBitSimplify.cpp | 252 uint16_t Begin, const HexagonInstrInfo &HII); 652 BitVector &Bits, uint16_t Begin, const HexagonInstrInfo &HII) { in getUsedBits() 995 const HexagonInstrInfo &HII; 1097 const HexagonInstrInfo &HII; 1403 ConstGeneration(BitTracker &bt, const HexagonInstrInfo &hii, in ConstGeneration() 1415 const HexagonInstrInfo &HII; 1534 CopyGeneration(BitTracker &bt, const HexagonInstrInfo &hii, in CopyGeneration() 1544 const HexagonInstrInfo &HII; 1776 const HexagonInstrInfo &hii, const HexagonRegisterInfo &hri, in BitSimplification() 1819 const HexagonInstrInfo &HII; [all …]
|
H A D | HexagonFrameLowering.cpp | 1718 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const { in expandCopy() 1739 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const { in expandStoreInt() 1772 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const { in expandLoadInt() 1803 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const { in expandStoreVecPred() 1840 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const { in expandLoadVecPred() 1875 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const { in expandStoreVec2() 1935 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const { in expandLoadVec2() 1976 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const { in expandStoreVec() 2005 const HexagonInstrInfo &HII, SmallVectorImpl<Register> &NewRegs) const { in expandLoadVec() 2486 const HexagonInstrInfo &HII, Register SP, unsigned CF) const { in expandAlloca()
|
H A D | HexagonVLIWPacketizer.cpp | 116 const HexagonInstrInfo *HII = nullptr; 567 const HexagonInstrInfo *HII) { in getPredicateSense() 576 const HexagonInstrInfo *HII) { in getPostIncrementOperand() 949 const HexagonInstrInfo *QII) { in getPredicatedRegister() 1106 const HexagonInstrInfo &HII) { in cannotCoexistAsymm()
|
H A D | HexagonVExtract.cpp | 55 const HexagonInstrInfo *HII = nullptr;
|
H A D | HexagonCopyToCombine.cpp | 60 const HexagonInstrInfo *TII; 125 static bool isCombinableInstType(MachineInstr &MI, const HexagonInstrInfo *TII, in isCombinableInstType()
|
H A D | HexagonRDFOpt.cpp | 220 auto &HII = static_cast<const HexagonInstrInfo&>(DFG.getTII()); in rewrite()
|
H A D | Hexagon.td | 392 def HexagonInstrInfo : InstrInfo; 502 let InstructionSet = HexagonInstrInfo;
|
H A D | HexagonGenMux.cpp | 88 const HexagonInstrInfo *HII = nullptr;
|
/openbsd/gnu/llvm/llvm/utils/gn/secondary/llvm/lib/Target/Hexagon/ |
H A D | BUILD.gn | 68 "HexagonInstrInfo.cpp",
|