acpi - Use KOBJ_GPRI_ACPI driver priorities for ig4 and gpio_intel.

* Since we currently don't handle the ACPI _DEP methods appropriately,
use the "global priority hack" from
5025fc65cd2448de8a5

acpi - Use KOBJ_GPRI_ACPI driver priorities for ig4 and gpio_intel.

* Since we currently don't handle the ACPI _DEP methods appropriately,
use the "global priority hack" from
5025fc65cd2448de8a5b7295c9936b473a7b0194 to enforce that ig4 and
gpio_intel attach before various ACPI namespace devices.

* This uses the KOBJ_GPRI_ACPI+1 and KOBJ_GPRI_ACPI+2 driver global priority
levels for important ACPI drivers, which may have to attach before other
ACPI devices can be used.

* This also adds the KOBJ_GPRI_ACPI global priority level to the sdhci_acpi
driver declaration.

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sdhci - Add missing BROKEN_DMA quirk for Apollo Lake in sdhci_acpi(4).

* Because of the APL18 erratum, DMA should be disabled on the Apollo Lake
controllers for now, until we have 64bit ADMA2, whi

sdhci - Add missing BROKEN_DMA quirk for Apollo Lake in sdhci_acpi(4).

* Because of the APL18 erratum, DMA should be disabled on the Apollo Lake
controllers for now, until we have 64bit ADMA2, which should work
reliably on these models. I forgot to add this flag in sdhci_acpi(4) in
commit 7ba10b88109826f7f4b59e318458760d74f2452e.

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Port initial UHS-1 support from FreeBSD (Only DDR52 for eMMC so far).

* Fix typo from FreeBSD commit:
SDHCI_CTRL2_DRIVER_TYPE_A/_C_D vs. SDHCI_CAN_DRIVE_TYPE_A/_C/_D.
And these Driver Type capab

Port initial UHS-1 support from FreeBSD (Only DDR52 for eMMC so far).

* Fix typo from FreeBSD commit:
SDHCI_CTRL2_DRIVER_TYPE_A/_C_D vs. SDHCI_CAN_DRIVE_TYPE_A/_C/_D.
And these Driver Type capability bits are in the CAPABILITIES2 register.

* Hide 1.8V VDD capability when the slot is detected as a removable card
slot, as the spec explicitly states that the 1.8V VDD is only meant to
be for embedded slots.

* This gives ca. 75 MiB/s read speed with the eMMC in my HP X2 210
detachable with the Intel Cherry Trail eMMC controller, in DDR52 mode.

Taken-From: FreeBSD (svn r315598)

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A step to correctly handling command timeouts in the MMC layer.

- Now that properly issuing CMD6 is crucial (so data isn't written to
the wrong partition for example), make a step into the

A step to correctly handling command timeouts in the MMC layer.

- Now that properly issuing CMD6 is crucial (so data isn't written to
the wrong partition for example), make a step into the direction of
correctly handling the timeout for these commands in the MMC layer.
Also, do a SEND_STATUS when CMD6 is invoked with an R1B response as
recommended by relevant specifications. However, quite some work is
left to be done in this regard; all other R1B-type commands done by
the MMC layer also should be followed by a SEND_STATUS (CMD13), the
erase timeout calculations/handling as documented in specifications
are entirely ignored so far, the MMC layer doesn't provide timeouts
applicable up to the bridge drivers and at least sdhci(4) currently
is hardcoding 1 s as timeout for all command types unconditionally.
Let alone already available return codes often not being checked in
the MMC layer ...

- For devices following the eMMC specification v4.41 or later, year 0
is 2013 rather than 1997; so correct this for assembling the device
ID string properly.

* This omits all the parts specific to eMMC "partitions" from the FreeBSD
change.

* Add the Intel sdhci controller ids to sdhci_pci.c to set the
SDHCI_QUIRK_WAIT_WHILE_BUSY quirk there.
This also disables DMA on apollo lake sdhci, while there and whitelists
ADMA2 on Bay Trail and Braswell sdhci controllers.

Taken-From: FreeBSD (svn r315430)

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More style, comments, includes and unused params fixes for sdhci and mmc.

Taken-From: FreeBSD (svn r314811)

Style fixes for sdhci(4) and mmc(4) in comments, includes, unused params.

Taken-From: FreeBSD (svn r315466)

sdhci - Add tunables for disabling SDMA and/or ADMA2, and for testing ADMA2.

* Also document hw.sdhci.debug tunable while there.

* Limit ADMA2 support to the already tested and working Intel sdhci

sdhci - Add tunables for disabling SDMA and/or ADMA2, and for testing ADMA2.

* Also document hw.sdhci.debug tunable while there.

* Limit ADMA2 support to the already tested and working Intel sdhci
controllers for now. Currently we only explicitly match against the Intel
models in sdhci_acpi(4).
XXX sdhci_pci(4) should explicitly match against the Intel sdhci
controllers as well to whitelist ADMA2 support, via the
SDHCI_QUIRK_WHITELIST_ADMA2 flag.

* For testing on not-yet whitelisted models, add the hw.sdhci.adma2_test
tunable to skip the whitelist check.

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sys/dev/disk/sdhci: Add sdhci_acpi for attaching via acpi resources.

* Only attaches on Bay- and Cherry-Trail atom devices.

* Not fully functional yet. At least this still needs fixes in mmc(4)
(

sys/dev/disk/sdhci: Add sdhci_acpi for attaching via acpi resources.

* Only attaches on Bay- and Cherry-Trail atom devices.

* Not fully functional yet. At least this still needs fixes in mmc(4)
(to get eMMC working) and ACPI improvements (for actually getting
SD-card bus power enabled via the _PS0 acpi method).

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