intr: Remove no longer correct ithread_cpuid; use rman_get_cpuid instead

Initial import of binutils 2.22 on the new vendor branch

Future versions of binutils will also reside on this branch rather
than continuing to create new binutils branches for each new version.

kernel: Use NULL for DRIVER_MODULE()'s evh & arg (which are pointers).

This is just cosmetics for easier reading.

re(4): Correct EEPROM location for certain versions of 8168F/8168E-VL

re(4): Preliminary 8168F support

re(4): Add 8168DP support

re(4): Correct 8168E settings

ether_input/rss: Pass packet info to ether_input_chain.

- Pass packet info to ether_input_chain(), if netisr_find_pktinfo_port()
could locate the msgport, then short circuit the rest of the ether_

ether_input/rss: Pass packet info to ether_input_chain.

- Pass packet info to ether_input_chain(), if netisr_find_pktinfo_port()
could locate the msgport, then short circuit the rest of the ether_input
code and dispatch the ethernet packet directly.
- Revoke the pi_hash field in pktinfo and extend the pktinfo_portfn_t to
accpet an mbuf parameter, so that pktinfo_portfn_t could change the mbuf
hash value. e.g. pktinfo_portfn_cpu0() will always set m_pkthdr.hash
to 0.
- Adjust ether_input_chain() callers accordingly.

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re(4): Don't sync coherent memory

re(4): Utilize bus_dmamap_load_mbuf_{segment,defrag}()

busdma(9): Add BUS_DMA_ALIGNED hint flag

This flag is used to give hint to busdma(9) that all to-be-loaded
memory is proper aligned, thus no bounce pages should be allocated.
This will be used when

busdma(9): Add BUS_DMA_ALIGNED hint flag

This flag is used to give hint to busdma(9) that all to-be-loaded
memory is proper aligned, thus no bounce pages should be allocated.
This will be used when busdma obeys alignment requirement.

It could save us some bounce page memory under following situation:
Some NICs require RX buffer to be 4 or 8 bytes aligned while our mbuf
cluster allocation always promises 2048 bytes alignment.

Rename BUS_DMA_ONEPAGE to BUS_DMA_ONEBPAGE, should have done that
in the first place though ...

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re(4): add missing BUS_DMA_WAITOK

Factor out bus_dmamem_coherent() to allocate busdma memory.
Mainly to avoid code duplication in various drivers.

Bounce page work

For NICs which support jumbo frame but need to allocate one TX
descriptor per segment, it does not make sense to allocate more
than one bounce page for a single TX mbuf busdma map.

Bounce page work

For NICs which support jumbo frame but need to allocate one TX
descriptor per segment, it does not make sense to allocate more
than one bounce page for a single TX mbuf busdma map. Add
BUS_DMA_ONEPAGE, so callers of busdma(9) functions could give
hint that only one bounce page is needed for a busdma map.

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Split RX/TX bus dma tag. RX buffers should to be aligned on 8 bytes.

Correct busdma(9) parameters

if_re needs miibus

Use pci_is_pcie()

Don't enable hardware timer simulated interrupt moderation on 8139C+.
This at least unbreaks the qemu support.

Reported-by: walt <wa1ter@myrealbox.com>

Don't set max read request size on 10/100 only PCIe NICs.
Setting max read request size to non-default value seems to cause these
kinds of NICs' DMA engine malfunction.

Reported-by: josepht@
Tested-

Don't set max read request size on 10/100 only PCIe NICs.
Setting max read request size to non-default value seems to cause these
kinds of NICs' DMA engine malfunction.

Reported-by: josepht@
Tested-by: josepht@
Based-on-patch-from: josepht@

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Recognize TTTech MC322

Obtained-from: OpenBSD

Filter out 8139 chips by PCI revid. It looks like certain 8139 does have
same hardware revision (in TXCFG) as 8139C+.

Reported-by: Antonio Huete Jimenez <ahuete.devel@gmail.com>
Obtained-from: Free

Filter out 8139 chips by PCI revid. It looks like certain 8139 does have
same hardware revision (in TXCFG) as 8139C+.

Reported-by: Antonio Huete Jimenez <ahuete.devel@gmail.com>
Obtained-from: FreeBSD

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Remove jumbo frame support for 8169; it never works (except slow ping) and
pullute the TX path a lot.

Put unknown hardware ids print back into bootverbose, mainly to suppress it
on a box with rl(4).

Try recollecting RX/TX descriptors if we are going to switch back to TX/RX
interrupts. There seems to be a race between turning on TX/RX interrupt and
asserting TX/RX interrupt by the hardware. Thi

Try recollecting RX/TX descriptors if we are going to switch back to TX/RX
interrupts. There seems to be a race between turning on TX/RX interrupt and
asserting TX/RX interrupt by the hardware. This fixes the poor performance
that I have seen when using single threaded remote cpdup.

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