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4985a545 |
| 30-Sep-2022 |
Julius Werner <jwerner@chromium.org> |
dt-bindings: memory: Add jedec,lpddrX-channel binding
This patch adds a new device tree binding for an LPDDR channel to serve as a top-level organizing node for LPDDR part nodes nested below it. An
dt-bindings: memory: Add jedec,lpddrX-channel binding
This patch adds a new device tree binding for an LPDDR channel to serve as a top-level organizing node for LPDDR part nodes nested below it. An LPDDR channel needs to have an "io-width" property to describe its width (this is important because this width does not always match the io-width of the part number, indicating that multiple parts are wired in parallel on the same channel), as well as one or more nested "rank@X" nodes. Those represent information about the individual ranks of each LPDDR part connected on that channel and should match the existing "jedec,lpddrX" bindings for individual LPDDR parts.
New platforms should be using this node -- the existing practice of providing a raw, toplevel "jedec,lpddrX" node without indication of how many identical parts are in the system should be considered deprecated.
Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220930220606.303395-4-jwerner@chromium.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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a500528f |
| 30-Sep-2022 |
Julius Werner <jwerner@chromium.org> |
dt-bindings: memory: Add jedec,lpddr4 and jedec,lpddr5 bindings
This patch adds bindings for LPDDR4 and LPDDR5 memory analogous to the existing bindings for LPDDR2 and LPDDR3. For now, the new types
dt-bindings: memory: Add jedec,lpddr4 and jedec,lpddr5 bindings
This patch adds bindings for LPDDR4 and LPDDR5 memory analogous to the existing bindings for LPDDR2 and LPDDR3. For now, the new types are only needed for topology description, so other properties like timing parameters are omitted. They can be added later if needed.
Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220930220606.303395-3-jwerner@chromium.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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686fe63b |
| 30-Sep-2022 |
Julius Werner <jwerner@chromium.org> |
dt-bindings: memory: Add numeric LPDDR compatible string variant
This patch allows a new kind of compatible string for LPDDR parts in the device tree bindings, in addition to the existing hardcoded
dt-bindings: memory: Add numeric LPDDR compatible string variant
This patch allows a new kind of compatible string for LPDDR parts in the device tree bindings, in addition to the existing hardcoded <vendor>,<part-number> strings. The new format contains manufacturer and part (revision) information in numerical form, such as lpddr3-ff,0201 for an LPDDR3 part with manufacturer ID ff and revision ID 0201. This helps cases where LPDDR parts are probed at runtime by boot firmware and cannot be matched to hardcoded part numbers, such as the firmware on the qcom/sc7280-herobrine boards does (which supports 4 different memory configurations at the moment, and more are expected to be added later at a point where the boot firmware can no longer be updated to specifically accommodate them).
Signed-off-by: Julius Werner <jwerner@chromium.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220930220606.303395-2-jwerner@chromium.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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b7178cd5 |
| 30-Sep-2022 |
Julius Werner <jwerner@chromium.org> |
dt-bindings: memory: Factor out common properties of LPDDR bindings
The bindings for different LPDDR versions mostly use the same kinds of properties, so in order to reduce duplication when we're ad
dt-bindings: memory: Factor out common properties of LPDDR bindings
The bindings for different LPDDR versions mostly use the same kinds of properties, so in order to reduce duplication when we're adding support for more versions, this patch creates a new lpddr-props subschema that can be referenced by the others to define these common parts. (This will consider a few smaller I/O width and density numbers "legal" for LPDDR3 that are usually not used there, but this should be harmless.)
Signed-off-by: Julius Werner <jwerner@chromium.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220930220606.303395-1-jwerner@chromium.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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