History log of /openbsd/sys/dev/pci/drm/include/linux/processor.h (Results 1 – 2 of 2)
Revision Date Author Comments
# 0f557061 11-Oct-2020 jsg <jsg@openbsd.org>

Align pool items on CACHELINESIZE when replacing linux kmem_cache with
SLAB_HWCACHE_ALIGN flag.

tested by semarie@


# 7f4dd379 14-Apr-2019 jsg <jsg@openbsd.org>

Update shared drm code, inteldrm(4) and radeondrm(4) from linux 4.4 to
linux 4.19.34.

Adds support for more Intel hardware:
Broxton/Apollo Lake (was is_preliminary in 4.4)
Amber Lake (another Kaby L

Update shared drm code, inteldrm(4) and radeondrm(4) from linux 4.4 to
linux 4.19.34.

Adds support for more Intel hardware:
Broxton/Apollo Lake (was is_preliminary in 4.4)
Amber Lake (another Kaby Lake refresh)
Gemini Lake
Coffee Lake
Whiskey Lake
Cannon Lake (though no hardware with Intel graphics ever shipped)
Ice Lake (alpha support, hardware not released)

This does not add support for new radeon hardware on the AMD side as
newer radeons have a different kernel driver (amdgpu).

Thanks to the OpenBSD Foundation for sponsoring this work, kettenis@ for
helping and a bunch of other developers for testing.

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