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Searched defs:MCG_CTL_P (Results 1 – 25 of 49) sorted by relevance

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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/docs/
H A DXRay.rst305 All the analysis tools that deal with traces use this implementation.
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/x86/include/asm/
H A Dmce.h13 #define MCG_CTL_P BIT_ULL(8) /* MCG_CTL register available */ macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/x86/include/asm/
H A Dmce.h13 #define MCG_CTL_P BIT_ULL(8) /* MCG_CTL register available */ macro
/dports/multimedia/libv4l/linux-5.13-rc2/arch/x86/include/asm/
H A Dmce.h13 #define MCG_CTL_P BIT_ULL(8) /* MCG_CTL register available */ macro
/dports/emulators/qemu60/qemu-6.0.0/roms/edk2/MdePkg/Include/Register/Intel/Msr/
H A DXeonDMsr.h305 UINT32 MCG_CTL_P:1; member
H A DHaswellEMsr.h269 UINT32 MCG_CTL_P:1; member
H A DSkylakeMsr.h3204 UINT32 MCG_CTL_P:1; member
/dports/emulators/qemu42/qemu-4.2.1/roms/edk2/UefiCpuPkg/Include/Register/Msr/
H A DXeonDMsr.h305 UINT32 MCG_CTL_P:1; member
H A DHaswellEMsr.h269 UINT32 MCG_CTL_P:1; member
H A DSkylakeMsr.h3204 UINT32 MCG_CTL_P:1; member
/dports/emulators/qemu/qemu-6.2.0/roms/edk2/MdePkg/Include/Register/Intel/Msr/
H A DXeonDMsr.h305 UINT32 MCG_CTL_P:1; member
H A DHaswellEMsr.h269 UINT32 MCG_CTL_P:1; member
/dports/emulators/qemu5/qemu-5.2.0/roms/edk2/MdePkg/Include/Register/Intel/Msr/
H A DXeonDMsr.h305 UINT32 MCG_CTL_P:1; member
H A DHaswellEMsr.h269 UINT32 MCG_CTL_P:1; member
/dports/emulators/qemu-utils/qemu-4.2.1/roms/edk2/UefiCpuPkg/Include/Register/Msr/
H A DXeonDMsr.h305 UINT32 MCG_CTL_P:1; member
H A DHaswellEMsr.h269 UINT32 MCG_CTL_P:1; member
/dports/sysutils/uefi-edk2-bhyve/edk2-edk2-stable202102/MdePkg/Include/Register/Intel/Msr/
H A DXeonDMsr.h305 UINT32 MCG_CTL_P:1; member
H A DHaswellEMsr.h269 UINT32 MCG_CTL_P:1; member
/dports/sysutils/uefi-edk2-qemu/edk2-edk2-stable201911/MdePkg/Include/Register/Intel/Msr/
H A DXeonDMsr.h305 UINT32 MCG_CTL_P:1; member
H A DHaswellEMsr.h269 UINT32 MCG_CTL_P:1; member
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/edk2/UefiCpuPkg/Include/Register/Msr/
H A DXeonDMsr.h305 UINT32 MCG_CTL_P:1; member
H A DHaswellEMsr.h269 UINT32 MCG_CTL_P:1; member
/dports/sysutils/edk2/edk2-edk2-stable202102/MdePkg/Include/Register/Intel/Msr/
H A DHaswellEMsr.h269 UINT32 MCG_CTL_P:1; member
/dports/emulators/unicorn/unicorn-1.0.2/qemu/target-i386/
H A Dcpu.h278 #define MCG_CTL_P (1ULL<<8) /* MCG_CAP register available */ macro
/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-i386/
H A Dcpu.h278 #define MCG_CTL_P (1ULL<<8) /* MCG_CAP register available */ macro

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