| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/control/ |
| H A D | ram_2port_impl.vh | 14 parameter OUT_REG = 0, // Instantiate an output register? (+1 cycle of read latency) constant
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| H A D | ram_2port.v | 59 parameter OUT_REG = 0, // Instantiate an output register? (+1 cycle of read latency) constant
|
| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/dsp/ |
| H A D | variable_delay_line.v | 34 parameter OUT_REG = 0, constant
|
| /dports/graphics/libosmesa-gallium/mesa-21.3.6/src/gallium/drivers/freedreno/a6xx/ |
| H A D | fd6_pack.h | 72 #define OUT_REG(ring, ...) \ macro
|
| /dports/lang/clover/mesa-21.3.6/src/gallium/drivers/freedreno/a6xx/ |
| H A D | fd6_pack.h | 72 #define OUT_REG(ring, ...) \ macro
|
| /dports/graphics/libosmesa/mesa-21.3.6/src/gallium/drivers/freedreno/a6xx/ |
| H A D | fd6_pack.h | 72 #define OUT_REG(ring, ...) \ macro
|
| /dports/graphics/mesa-libs/mesa-21.3.6/src/gallium/drivers/freedreno/a6xx/ |
| H A D | fd6_pack.h | 72 #define OUT_REG(ring, ...) \ macro
|
| /dports/graphics/mesa-gallium-xa/mesa-21.3.6/src/gallium/drivers/freedreno/a6xx/ |
| H A D | fd6_pack.h | 72 #define OUT_REG(ring, ...) \ macro
|
| /dports/graphics/mesa-dri-gallium/mesa-21.3.6/src/gallium/drivers/freedreno/a6xx/ |
| H A D | fd6_pack.h | 72 #define OUT_REG(ring, ...) \ macro
|
| /dports/graphics/mesa-gallium-va/mesa-21.3.6/src/gallium/drivers/freedreno/a6xx/ |
| H A D | fd6_pack.h | 72 #define OUT_REG(ring, ...) \ macro
|
| /dports/graphics/mesa-gallium-vdpau/mesa-21.3.6/src/gallium/drivers/freedreno/a6xx/ |
| H A D | fd6_pack.h | 72 #define OUT_REG(ring, ...) \ macro
|
| /dports/graphics/mesa-devel/mesa-22.0-branchpoint-2059-ge8a63cf61ec/src/gallium/drivers/freedreno/a6xx/ |
| H A D | fd6_pack.h | 72 #define OUT_REG(ring, ...) \ macro
|
| /dports/graphics/mesa-dri/mesa-21.3.6/src/gallium/drivers/freedreno/a6xx/ |
| H A D | fd6_pack.h | 72 #define OUT_REG(ring, ...) \ macro
|
| /dports/graphics/mesa-dri-classic/mesa-20.2.3/src/gallium/drivers/freedreno/a6xx/ |
| H A D | fd6_pack.h | 77 #define OUT_REG(ring, ...) \ macro
|
| /dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/config/ia64/ |
| H A D | ia64.h | 299 #define OUT_REG(REGNO) ((REGNO) + 120) macro
|
| /dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/config/ia64/ |
| H A D | ia64.h | 299 #define OUT_REG(REGNO) ((REGNO) + 120) macro
|
| /dports/devel/avr-gcc/gcc-10.2.0/gcc/config/ia64/ |
| H A D | ia64.h | 299 #define OUT_REG(REGNO) ((REGNO) + 120) macro
|
| /dports/lang/gnat_util/gcc-6-20180516/gcc/config/ia64/ |
| H A D | ia64.h | 305 #define OUT_REG(REGNO) ((REGNO) + 120) macro
|
| /dports/lang/gcc11-devel/gcc-11-20211009/gcc/config/ia64/ |
| H A D | ia64.h | 299 #define OUT_REG(REGNO) ((REGNO) + 120) macro
|
| /dports/lang/gcc48/gcc-4.8.5/gcc/config/ia64/ |
| H A D | ia64.h | 312 #define OUT_REG(REGNO) ((REGNO) + 120) macro
|
| /dports/lang/gcc10-devel/gcc-10-20211008/gcc/config/ia64/ |
| H A D | ia64.h | 299 #define OUT_REG(REGNO) ((REGNO) + 120) macro
|
| /dports/lang/gcc12-devel/gcc-12-20211205/gcc/config/ia64/ |
| H A D | ia64.h | 299 #define OUT_REG(REGNO) ((REGNO) + 120) macro
|
| /dports/devel/mingw32-gcc/gcc-4.8.1/gcc/config/ia64/ |
| H A D | ia64.h | 312 #define OUT_REG(REGNO) ((REGNO) + 120) macro
|
| /dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/config/ia64/ |
| H A D | ia64.h | 299 #define OUT_REG(REGNO) ((REGNO) + 120) macro
|
| /dports/lang/gcc11/gcc-11.2.0/gcc/config/ia64/ |
| H A D | ia64.h | 299 #define OUT_REG(REGNO) ((REGNO) + 120) macro
|