/netbsd/external/apache2/llvm/dist/llvm/lib/Target/XCore/Disassembler/ |
H A D | XCoreDisassembler.cpp | 346 unsigned Op1, Op2; in Decode2RInstruction() local 359 unsigned Op1, Op2; in Decode2RImmInstruction() local 372 unsigned Op1, Op2; in DecodeR2RInstruction() local 385 unsigned Op1, Op2; in Decode2RSrcDstInstruction() local 399 unsigned Op1, Op2; in DecodeRUSInstruction() local 412 unsigned Op1, Op2; in DecodeRUSBitpInstruction() local 425 unsigned Op1, Op2; in DecodeRUSSrcDstBitpInstruction() local 510 unsigned Op1, Op2; in DecodeL2RInstruction() local 524 unsigned Op1, Op2; in DecodeLR2RInstruction() local 538 unsigned Op1, Op2, Op3; in Decode3RInstruction() local [all …]
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/netbsd/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAGTargetInfo.h | 52 SDValue Chain, SDValue Op1, in EmitTargetCodeForMemcpy() 68 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, in EmitTargetCodeForMemmove() 81 SDValue Chain, SDValue Op1, in EmitTargetCodeForMemset() 94 SDValue Op1, SDValue Op2, SDValue Op3, in EmitTargetCodeForMemcmp() 131 SDValue Op1, SDValue Op2, in EmitTargetCodeForStrcmp()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Analysis/ |
H A D | InstructionSimplify.cpp | 300 BinaryOperator *Op1 = dyn_cast<BinaryOperator>(RHS); in SimplifyAssociativeBinOp() local 597 Value *&Op0, Value *&Op1, in foldOrCommuteConstant() 926 static Value *simplifyDivRem(Value *Op0, Value *Op1, bool IsDiv, in simplifyDivRem() 1391 Value *llvm::SimplifyLShrInst(Value *Op0, Value *Op1, bool isExact, in SimplifyLShrInst() 1772 static Value *simplifyAndOfICmps(ICmpInst *Op0, ICmpInst *Op1, in simplifyAndOfICmps() 1848 static Value *simplifyOrOfICmps(ICmpInst *Op0, ICmpInst *Op1, in simplifyOrOfICmps() 1953 static Value *simplifyLogicOfAddSub(Value *Op0, Value *Op1, in simplifyLogicOfAddSub() 4639 static Value *SimplifyShuffleVectorInst(Value *Op0, Value *Op1, in SimplifyShuffleVectorInst() 4755 Value *llvm::SimplifyShuffleVectorInst(Value *Op0, Value *Op1, in SimplifyShuffleVectorInst() 5700 Value *Op1 = Call->getArgOperand(1); in simplifyIntrinsic() local [all …]
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H A D | OverflowInstAnalysis.cpp | 22 bool llvm::isCheckForZeroAndMulWithOverflow(Value *Op0, Value *Op1, bool IsAnd, in isCheckForZeroAndMulWithOverflow() 68 bool llvm::isCheckForZeroAndMulWithOverflow(Value *Op0, Value *Op1, in isCheckForZeroAndMulWithOverflow()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineMulDivRem.cpp | 156 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitMul() local 400 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in foldFPSignBitOps() local 450 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitFMul() local 724 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in commonIDivTransforms() local 1013 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitUDiv() local 1107 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitSDiv() local 1280 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in foldFDivPowDivisor() local 1337 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitFDiv() local 1429 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in commonIRemTransforms() local 1481 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitURem() local [all …]
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H A D | InstCombineAndOrXor.cpp | 1493 Value *Op0 = BO.getOperand(0), *Op1 = BO.getOperand(1), *X; in reassociateFCmps() local 1611 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in foldCastedBitwiseLogic() local 1677 Value *Op1 = I.getOperand(1); in foldAndToXor() local 1703 Value *Op1 = I.getOperand(1); in foldOrToXor() local 1748 Value *Op0 = And.getOperand(0), *Op1 = And.getOperand(1); in narrowMaskedBinOp() local 1813 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitAnd() local 2217 Value *Op0 = Or.getOperand(0), *Op1 = Or.getOperand(1); in matchOrConcat() local 2657 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitOr() local 2986 Value *Op1 = I.getOperand(1); in foldXorToXor() local 3213 Value *Op0 = Xor.getOperand(0), *Op1 = Xor.getOperand(1); in canonicalizeAbs() local [all …]
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H A D | InstCombineShifts.cpp | 373 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in commonShiftTransforms() local 662 Instruction *InstCombinerImpl::FoldShiftByConstant(Value *Op0, Constant *Op1, in FoldShiftByConstant() 907 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitShl() local 1049 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitLShr() local 1271 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1); in visitAShr() local
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/Lanai/MCTargetDesc/ |
H A D | LanaiMCCodeEmitter.cpp | 189 const MCOperand Op1 = Inst.getOperand(OpNo + 0); in getRiMemoryOpValue() local 221 const MCOperand Op1 = Inst.getOperand(OpNo + 0); in getRrMemoryOpValue() local 260 const MCOperand Op1 = Inst.getOperand(OpNo + 0); in getSplsOpValue() local
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64ExpandImm.h | 24 uint64_t Op1; member
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/netbsd/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | MachineIRBuilder.h | 488 const SrcOp &Op1) { in buildPtrMask() 521 const SrcOp &Op0, const SrcOp &Op1) { in buildUAddo() 527 const SrcOp &Op0, const SrcOp &Op1) { in buildUSubo() 533 const SrcOp &Op0, const SrcOp &Op1) { in buildSAddo() 539 const SrcOp &Op0, const SrcOp &Op1) { in buildSSubo() 558 const SrcOp &Op0, const SrcOp &Op1, in buildUAdde() 566 const SrcOp &Op0, const SrcOp &Op1, in buildUSube() 574 const SrcOp &Op0, const SrcOp &Op1, in buildSAdde() 582 const SrcOp &Op0, const SrcOp &Op1, in buildSSube()
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/netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/ |
H A D | ConstraintElimination.cpp | 57 Value *Op0, *Op1; in decompose() local 100 Value *Op1; in decompose() local 128 getConstraint(CmpInst::Predicate Pred, Value *Op0, Value *Op1, in getConstraint() 287 Value *Op0, *Op1; in eliminateConstraints() local
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/netbsd/sys/external/bsd/acpica/dist/compiler/ |
H A D | asltree.c | 541 ACPI_PARSE_OBJECT *Op1, in TrLinkPeerOp() 678 ACPI_PARSE_OBJECT *Op1, in TrLinkChildOp()
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/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
H A D | DFAPacketizer.cpp | 282 bool VLIWPacketizerList::alias(const MachineMemOperand &Op1, in alias() 307 for (const MachineMemOperand *Op1 : MI1.memoperands()) in alias() local
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AArch64/Utils/ |
H A D | AArch64BaseInfo.cpp | 142 uint32_t Op0 = 0, Op1 = 0, CRn = 0, CRm = 0, Op2 = 0; in parseGenericRegister() local 157 uint32_t Op1 = (Bits >> 11) & 0x7; in genericRegisterString() local
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86RegisterBankInfo.cpp | 214 auto &Op1 = MI.getOperand(1); in getInstrMapping() local 243 auto &Op1 = MI.getOperand(1); in getInstrMapping() local
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H A D | X86InstCombineIntrinsic.cpp | 537 Value *Op1 = II.getArgOperand(1); in simplifyX86addcarry() local 711 static Value *simplifyX86insertq(IntrinsicInst &II, Value *Op0, Value *Op1, in simplifyX86insertq() 1467 Value *Op1 = II.getArgOperand(1); in instCombineIntrinsic() local 1532 Value *Op1 = II.getArgOperand(1); in instCombineIntrinsic() local 1568 Value *Op1 = II.getArgOperand(1); in instCombineIntrinsic() local 1613 Value *Op1 = II.getArgOperand(1); in instCombineIntrinsic() local
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/Lanai/ |
H A D | LanaiMemAluCombiner.cpp | 170 bool isSameOperand(const MachineOperand &Op1, const MachineOperand &Op2) { in isSameOperand() 293 MachineOperand &Op1 = AluIter->getOperand(1); in isSuitableAluInstr() local
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/netbsd/sys/arch/arm/samsung/ |
H A D | smc.h | 63 #define SMC_REG_ID_CP15(CRn, Op1, CRm, Op2) \ argument
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
H A D | HexagonSplitDouble.cpp | 344 const MachineOperand &Op1 = MI->getOperand(1); in profit() local 700 MachineOperand &Op1 = MI->getOperand(1); in splitImmediate() local 727 MachineOperand &Op1 = MI->getOperand(1); in splitCombine() local 757 MachineOperand &Op1 = MI->getOperand(1); in splitExt() local 779 MachineOperand &Op1 = MI->getOperand(1); in splitShift() local 903 MachineOperand &Op1 = MI->getOperand(1); in splitAslOr() local
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUInstCombineIntrinsic.cpp | 170 bool GCNTTIImpl::canSimplifyLegacyMulToMul(const Value *Op0, const Value *Op1, in canSimplifyLegacyMulToMul() 807 Value *Op1 = II.getArgOperand(1); in instCombineIntrinsic() local 853 Value *Op1 = II.getArgOperand(1); in instCombineIntrinsic() local 873 Value *Op1 = II.getArgOperand(1); in instCombineIntrinsic() local
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/netbsd/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeFloatTypes.cpp | 1003 SDValue Op1 = N->getOperand(IsStrict ? 2 : 1); in SoftenFloatOp_SETCC() local 2118 SDValue Op1 = GetPromotedFloat(N->getOperand(1)); in PromoteFloatOp_FCOPYSIGN() local 2166 SDValue Op1 = GetPromotedFloat(N->getOperand(1)); in PromoteFloatOp_SETCC() local 2392 SDValue Op1 = N->getOperand(1); in PromoteFloatRes_FCOPYSIGN() local 2415 SDValue Op1 = GetPromotedFloat(N->getOperand(1)); in PromoteFloatRes_BinOp() local 2423 SDValue Op1 = GetPromotedFloat(N->getOperand(1)); in PromoteFloatRes_FMAD() local 2434 SDValue Op1 = N->getOperand(1); in PromoteFloatRes_FPOWI() local 2739 SDValue Op1 = N->getOperand(1); in SoftPromoteHalfRes_FPOWI() local 2911 SDValue Op1 = N->getOperand(1); in SoftPromoteHalfOp_FCOPYSIGN() local 2970 SDValue Op1 = N->getOperand(1); in SoftPromoteHalfOp_SELECT_CC() local [all …]
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/netbsd/external/apache2/llvm/dist/llvm/lib/Transforms/AggressiveInstCombine/ |
H A D | AggressiveInstCombine.cpp | 220 Value *Op0, *Op1; in matchAndOrChain() local 329 Value *Op1 = I.getOperand(1); in tryToRecognizePopCount() local
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblySelectionDAGInfo.cpp | 37 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Op1, SDValue Op2, in EmitTargetCodeForMemmove()
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H A D | WebAssemblyPeephole.cpp | 156 MachineOperand &Op1 = MI.getOperand(1); in runOnMachineFunction() local
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/netbsd/external/apache2/llvm/dist/llvm/lib/Target/BPF/MCTargetDesc/ |
H A D | BPFMCCodeEmitter.cpp | 169 const MCOperand Op1 = MI.getOperand(MemOpStartIndex); in getMemoryOpValue() local
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