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Searched defs:RORW (Results 1 – 14 of 14) sorted by relevance

/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h55 RORW, enumerator
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h55 RORW, enumerator
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h60 RORW, enumerator
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/RISCV/
H A DRISCVISelLowering.h60 RORW, enumerator
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h60 RORW, enumerator
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h60 RORW, enumerator
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h60 RORW, enumerator
/dports/emulators/fs-uae/fs-uae-3.1.35/src/dosbox/
H A Dinstructions.h296 #define RORW(op1,op2,load,save) \ macro
/dports/emulators/dosbox/dosbox-0.74-3/src/cpu/
H A Dinstructions.h296 #define RORW(op1,op2,load,save) \ macro
/dports/emulators/dosbox-staging/dosbox-staging-0.78.0/src/cpu/
H A Dinstructions.h273 #define RORW(op1,op2,load,save) \ macro
/dports/games/libretro-dosbox/dosbox-libretro-aa71b67/src/cpu/
H A Dinstructions.h296 #define RORW(op1,op2,load,save) \ macro
/dports/audio/deadbeef/deadbeef-0.7.2/plugins/sc68/libsc68/emu68/
H A Dmacro68.h269 #define RORW(R, A, B) R = _ROR(A, B, 16-1) macro
/dports/security/snowflake-tor/snowflake-ead5a960d7fa19dc890ccbfc0765c5ab6629eaa9/vendor/github.com/mmcloughlin/avo/build/
H A Dzinstructions.go13407 func (c *Context) RORW(ci, mr operand.Op) { func
13427 func RORW(ci, mr operand.Op) { ctx.RORW(ci, mr) } func
/dports/security/snowflake-tor/snowflake-ead5a960d7fa19dc890ccbfc0765c5ab6629eaa9/vendor/github.com/mmcloughlin/avo/x86/
H A Dzctors.go16059 func RORW(ci, mr operand.Op) (*intrep.Instruction, error) { func