/dports/multimedia/libva-intel-media-driver/media-driver-intel-media-22.1.1/media_driver/agnostic/gen9_bxt/hw/vdbox/ |
H A D | mhw_vdbox_vdenc_hwcmd_g9_bxt.cpp | 358 mhw_vdbox_vdenc_g9_bxt::VDENC_PIPE_BUF_ADDR_STATE_CMD::VDENC_PIPE_BUF_ADDR_STATE_CMD() in VDENC_PIPE_BUF_ADDR_STATE_CMD() function in mhw_vdbox_vdenc_g9_bxt::VDENC_PIPE_BUF_ADDR_STATE_CMD
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H A D | mhw_vdbox_vdenc_hwcmd_g9_bxt.h | 2232 struct VDENC_PIPE_BUF_ADDR_STATE_CMD struct 2235 { 2248 } DW0; 2256 …dRef0 ; //!< FWD REF0 2257 …dRef1 ; //!< FWD REF1 2258 …dRef2 ; //!< FWD REF2 2259 …dRef0 ; //!< BWD REF0 2264 enum SUBOPB 2292 VDENC_PIPE_BUF_ADDR_STATE_CMD(); argument 2294 static const size_t dwSize = 37; [all …]
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/dports/multimedia/libva-intel-media-driver/media-driver-intel-media-22.1.1/media_driver/agnostic/gen9_skl/hw/vdbox/ |
H A D | mhw_vdbox_vdenc_hwcmd_g9_skl.cpp | 358 mhw_vdbox_vdenc_g9_skl::VDENC_PIPE_BUF_ADDR_STATE_CMD::VDENC_PIPE_BUF_ADDR_STATE_CMD() in VDENC_PIPE_BUF_ADDR_STATE_CMD() function in mhw_vdbox_vdenc_g9_skl::VDENC_PIPE_BUF_ADDR_STATE_CMD
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H A D | mhw_vdbox_vdenc_hwcmd_g9_skl.h | 2243 struct VDENC_PIPE_BUF_ADDR_STATE_CMD struct 2246 { 2259 } DW0; 2267 …dRef0 ; //!< FWD REF0 2268 …dRef1 ; //!< FWD REF1 2269 …dRef2 ; //!< FWD REF2 2270 …dRef0 ; //!< BWD REF0 2275 enum SUBOPB 2303 VDENC_PIPE_BUF_ADDR_STATE_CMD(); argument 2305 static const size_t dwSize = 37; [all …]
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/dports/multimedia/cmrtlib/media-driver-intel-media-20.1.1/media_driver/agnostic/gen9_skl/hw/vdbox/ |
H A D | mhw_vdbox_vdenc_hwcmd_g9_skl.cpp | 358 mhw_vdbox_vdenc_g9_skl::VDENC_PIPE_BUF_ADDR_STATE_CMD::VDENC_PIPE_BUF_ADDR_STATE_CMD() in VDENC_PIPE_BUF_ADDR_STATE_CMD() function in mhw_vdbox_vdenc_g9_skl::VDENC_PIPE_BUF_ADDR_STATE_CMD
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H A D | mhw_vdbox_vdenc_hwcmd_g9_skl.h | 2243 struct VDENC_PIPE_BUF_ADDR_STATE_CMD struct 2246 { 2259 } DW0; 2267 …dRef0 ; //!< FWD REF0 2268 …dRef1 ; //!< FWD REF1 2269 …dRef2 ; //!< FWD REF2 2270 …dRef0 ; //!< BWD REF0 2275 enum SUBOPB 2303 VDENC_PIPE_BUF_ADDR_STATE_CMD(); argument 2305 static const size_t dwSize = 37; [all …]
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/dports/multimedia/cmrtlib/media-driver-intel-media-20.1.1/media_driver/agnostic/gen9_bxt/hw/vdbox/ |
H A D | mhw_vdbox_vdenc_hwcmd_g9_bxt.cpp | 358 mhw_vdbox_vdenc_g9_bxt::VDENC_PIPE_BUF_ADDR_STATE_CMD::VDENC_PIPE_BUF_ADDR_STATE_CMD() in VDENC_PIPE_BUF_ADDR_STATE_CMD() function in mhw_vdbox_vdenc_g9_bxt::VDENC_PIPE_BUF_ADDR_STATE_CMD
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H A D | mhw_vdbox_vdenc_hwcmd_g9_bxt.h | 2232 struct VDENC_PIPE_BUF_ADDR_STATE_CMD struct 2235 { 2248 } DW0; 2256 …dRef0 ; //!< FWD REF0 2257 …dRef1 ; //!< FWD REF1 2258 …dRef2 ; //!< FWD REF2 2259 …dRef0 ; //!< BWD REF0 2264 enum SUBOPB 2292 VDENC_PIPE_BUF_ADDR_STATE_CMD(); argument 2294 static const size_t dwSize = 37; [all …]
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/dports/multimedia/libva-intel-media-driver/media-driver-intel-media-22.1.1/media_driver/agnostic/gen9_kbl/hw/vdbox/ |
H A D | mhw_vdbox_vdenc_hwcmd_g9_kbl.cpp | 374 mhw_vdbox_vdenc_g9_kbl::VDENC_PIPE_BUF_ADDR_STATE_CMD::VDENC_PIPE_BUF_ADDR_STATE_CMD() in VDENC_PIPE_BUF_ADDR_STATE_CMD() function in mhw_vdbox_vdenc_g9_kbl::VDENC_PIPE_BUF_ADDR_STATE_CMD
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H A D | mhw_vdbox_vdenc_hwcmd_g9_kbl.h | 2325 struct VDENC_PIPE_BUF_ADDR_STATE_CMD struct 2328 { 2341 } DW0; 2349 …dRef0 ; //!< FWD REF0 2350 …dRef1 ; //!< FWD REF1 2351 …dRef2 ; //!< FWD REF2 2352 …dRef0 ; //!< BWD REF0 2357 enum SUBOPB 2385 VDENC_PIPE_BUF_ADDR_STATE_CMD(); argument 2387 static const size_t dwSize = 37; [all …]
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/dports/multimedia/cmrtlib/media-driver-intel-media-20.1.1/media_driver/agnostic/gen9_kbl/hw/vdbox/ |
H A D | mhw_vdbox_vdenc_hwcmd_g9_kbl.cpp | 374 mhw_vdbox_vdenc_g9_kbl::VDENC_PIPE_BUF_ADDR_STATE_CMD::VDENC_PIPE_BUF_ADDR_STATE_CMD() in VDENC_PIPE_BUF_ADDR_STATE_CMD() function in mhw_vdbox_vdenc_g9_kbl::VDENC_PIPE_BUF_ADDR_STATE_CMD
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H A D | mhw_vdbox_vdenc_hwcmd_g9_kbl.h | 2325 struct VDENC_PIPE_BUF_ADDR_STATE_CMD struct 2328 { 2341 } DW0; 2349 …dRef0 ; //!< FWD REF0 2350 …dRef1 ; //!< FWD REF1 2351 …dRef2 ; //!< FWD REF2 2352 …dRef0 ; //!< BWD REF0 2357 enum SUBOPB 2385 VDENC_PIPE_BUF_ADDR_STATE_CMD(); argument 2387 static const size_t dwSize = 37; [all …]
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/dports/multimedia/libva-intel-media-driver/media-driver-intel-media-22.1.1/media_driver/agnostic/gen11/hw/vdbox/ |
H A D | mhw_vdbox_vdenc_hwcmd_g11_X.cpp | 472 mhw_vdbox_vdenc_g11_X::VDENC_PIPE_BUF_ADDR_STATE_CMD::VDENC_PIPE_BUF_ADDR_STATE_CMD() in VDENC_PIPE_BUF_ADDR_STATE_CMD() function in mhw_vdbox_vdenc_g11_X::VDENC_PIPE_BUF_ADDR_STATE_CMD
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H A D | mhw_vdbox_vdenc_hwcmd_g11_X.h | 2843 struct VDENC_PIPE_BUF_ADDR_STATE_CMD struct 2846 { 2859 } DW0; 2867 …dRef0 ; //!< FWD REF0 2868 …dRef1 ; //!< FWD REF1 2881 { 2888 } DW61; 2892 enum SUBOPB 2920 VDENC_PIPE_BUF_ADDR_STATE_CMD(); argument 2922 static const size_t dwSize = 62; [all …]
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/dports/multimedia/libva-intel-media-driver/media-driver-intel-media-22.1.1/media_driver/agnostic/gen10/hw/vdbox/ |
H A D | mhw_vdbox_vdenc_hwcmd_g10_X.cpp | 474 mhw_vdbox_vdenc_g10_X::VDENC_PIPE_BUF_ADDR_STATE_CMD::VDENC_PIPE_BUF_ADDR_STATE_CMD() in VDENC_PIPE_BUF_ADDR_STATE_CMD() function in mhw_vdbox_vdenc_g10_X::VDENC_PIPE_BUF_ADDR_STATE_CMD
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H A D | mhw_vdbox_vdenc_hwcmd_g10_X.h | 2855 struct VDENC_PIPE_BUF_ADDR_STATE_CMD struct 2858 { 2871 } DW0; 2879 …dRef0 ; //!< FWD REF0 2880 …dRef1 ; //!< FWD REF1 2893 { 2900 } DW61; 2904 enum SUBOPB 2932 VDENC_PIPE_BUF_ADDR_STATE_CMD(); argument 2934 static const size_t dwSize = 62; [all …]
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/dports/multimedia/cmrtlib/media-driver-intel-media-20.1.1/media_driver/agnostic/gen10/hw/vdbox/ |
H A D | mhw_vdbox_vdenc_hwcmd_g10_X.cpp | 474 mhw_vdbox_vdenc_g10_X::VDENC_PIPE_BUF_ADDR_STATE_CMD::VDENC_PIPE_BUF_ADDR_STATE_CMD() in VDENC_PIPE_BUF_ADDR_STATE_CMD() function in mhw_vdbox_vdenc_g10_X::VDENC_PIPE_BUF_ADDR_STATE_CMD
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H A D | mhw_vdbox_vdenc_hwcmd_g10_X.h | 2855 struct VDENC_PIPE_BUF_ADDR_STATE_CMD struct 2858 { 2871 } DW0; 2879 …dRef0 ; //!< FWD REF0 2880 …dRef1 ; //!< FWD REF1 2893 { 2900 } DW61; 2904 enum SUBOPB 2932 VDENC_PIPE_BUF_ADDR_STATE_CMD(); argument 2934 static const size_t dwSize = 62; [all …]
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/dports/multimedia/cmrtlib/media-driver-intel-media-20.1.1/media_driver/agnostic/gen11/hw/vdbox/ |
H A D | mhw_vdbox_vdenc_hwcmd_g11_X.cpp | 472 mhw_vdbox_vdenc_g11_X::VDENC_PIPE_BUF_ADDR_STATE_CMD::VDENC_PIPE_BUF_ADDR_STATE_CMD() in VDENC_PIPE_BUF_ADDR_STATE_CMD() function in mhw_vdbox_vdenc_g11_X::VDENC_PIPE_BUF_ADDR_STATE_CMD
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H A D | mhw_vdbox_vdenc_hwcmd_g11_X.h | 2843 struct VDENC_PIPE_BUF_ADDR_STATE_CMD struct 2846 { 2859 } DW0; 2867 …dRef0 ; //!< FWD REF0 2868 …dRef1 ; //!< FWD REF1 2881 { 2888 } DW61; 2892 enum SUBOPB 2920 VDENC_PIPE_BUF_ADDR_STATE_CMD(); argument 2922 static const size_t dwSize = 62; [all …]
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/dports/multimedia/libva-intel-media-driver/media-driver-intel-media-22.1.1/media_driver/agnostic/gen12/hw/vdbox/ |
H A D | mhw_vdbox_vdenc_hwcmd_g12_X.cpp | 470 mhw_vdbox_vdenc_g12_X::VDENC_PIPE_BUF_ADDR_STATE_CMD::VDENC_PIPE_BUF_ADDR_STATE_CMD() in VDENC_PIPE_BUF_ADDR_STATE_CMD() function in mhw_vdbox_vdenc_g12_X::VDENC_PIPE_BUF_ADDR_STATE_CMD
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H A D | mhw_vdbox_vdenc_hwcmd_g12_X.h | 2813 struct VDENC_PIPE_BUF_ADDR_STATE_CMD struct 2816 { 2829 } DW0; 2832 { 2848 { 2859 { 2866 } DW61; 2873 enum SUBOPB 2901 VDENC_PIPE_BUF_ADDR_STATE_CMD(); argument 2903 static const size_t dwSize = 71; [all …]
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/dports/multimedia/cmrtlib/media-driver-intel-media-20.1.1/media_driver/agnostic/gen12/hw/vdbox/ |
H A D | mhw_vdbox_vdenc_hwcmd_g12_X.cpp | 470 mhw_vdbox_vdenc_g12_X::VDENC_PIPE_BUF_ADDR_STATE_CMD::VDENC_PIPE_BUF_ADDR_STATE_CMD() in VDENC_PIPE_BUF_ADDR_STATE_CMD() function in mhw_vdbox_vdenc_g12_X::VDENC_PIPE_BUF_ADDR_STATE_CMD
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H A D | mhw_vdbox_vdenc_hwcmd_g12_X.h | 2811 struct VDENC_PIPE_BUF_ADDR_STATE_CMD struct 2814 { 2827 } DW0; 2830 { 2846 { 2857 { 2864 } DW61; 2871 enum SUBOPB 2899 VDENC_PIPE_BUF_ADDR_STATE_CMD(); argument 2901 static const size_t dwSize = 71; [all …]
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