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Searched defs:XHC_PORTSC_OFFSET (Results 1 – 25 of 30) sorted by relevance

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/dports/devel/llvm13/llvm-project-13.0.1.src/lldb/test/API/functionalities/postmortem/minidump/
H A DTestMiniDump.py57 'uuid' : 'BBB0846A-402C-4052-A16B-67650BBFE6B0-00000002',
/dports/emulators/qemu42/qemu-4.2.1/roms/edk2/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhciReg.h57 #define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset macro
/dports/emulators/qemu/qemu-6.2.0/roms/edk2/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhciReg.h57 #define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset macro
/dports/emulators/qemu5/qemu-5.2.0/roms/edk2/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhciReg.h57 #define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/edk2/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhciReg.h57 #define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset macro
/dports/sysutils/uefi-edk2-qemu/edk2-edk2-stable201911/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhciReg.h57 #define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset macro
/dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhciReg.h61 #define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset macro
/dports/sysutils/uefi-edk2-bhyve/edk2-edk2-stable202102/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhciReg.h57 #define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset macro
/dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhciReg.h61 #define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/edk2/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhciReg.h57 #define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset macro
/dports/emulators/qemu60/qemu-6.0.0/roms/edk2/MdeModulePkg/Bus/Pci/XhciDxe/
H A DXhciReg.h57 #define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset macro
/dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/MdeModulePkg/Bus/Pci/XhciPei/
H A DXhciReg.h42 #define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset macro
/dports/emulators/qemu42/qemu-4.2.1/roms/edk2/MdeModulePkg/Bus/Pci/XhciPei/
H A DXhciReg.h35 #define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset macro
/dports/emulators/qemu5/qemu-5.2.0/roms/edk2/MdeModulePkg/Bus/Pci/XhciPei/
H A DXhciReg.h35 #define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset macro
/dports/sysutils/uefi-edk2-bhyve/edk2-edk2-stable202102/MdeModulePkg/Bus/Pci/XhciPei/
H A DXhciReg.h35 #define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset macro
/dports/sysutils/uefi-edk2-qemu/edk2-edk2-stable201911/MdeModulePkg/Bus/Pci/XhciPei/
H A DXhciReg.h35 #define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/edk2/MdeModulePkg/Bus/Pci/XhciPei/
H A DXhciReg.h35 #define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/edk2/MdeModulePkg/Bus/Pci/XhciPei/
H A DXhciReg.h35 #define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset macro
/dports/emulators/qemu/qemu-6.2.0/roms/edk2/MdeModulePkg/Bus/Pci/XhciPei/
H A DXhciReg.h35 #define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset macro
/dports/emulators/qemu60/qemu-6.0.0/roms/edk2/MdeModulePkg/Bus/Pci/XhciPei/
H A DXhciReg.h35 #define XHC_PORTSC_OFFSET 0x0400 // Port Status and Control Register Offset macro
/dports/emulators/qemu60/qemu-6.0.0/roms/edk2/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/
H A DDebugCommunicationLibUsb3Internal.h68 #define XHC_PORTSC_OFFSET 0x400 // Port Status and Control Register Offset macro
/dports/emulators/qemu/qemu-6.2.0/roms/edk2/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/
H A DDebugCommunicationLibUsb3Internal.h68 #define XHC_PORTSC_OFFSET 0x400 // Port Status and Control Register Offset macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/edk2/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/
H A DDebugCommunicationLibUsb3Internal.h68 #define XHC_PORTSC_OFFSET 0x400 // Port Status and Control Register Offset macro
/dports/emulators/qemu5/qemu-5.2.0/roms/edk2/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/
H A DDebugCommunicationLibUsb3Internal.h68 #define XHC_PORTSC_OFFSET 0x400 // Port Status and Control Register Offset macro
/dports/emulators/qemu42/qemu-4.2.1/roms/edk2/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/
H A DDebugCommunicationLibUsb3Internal.h68 #define XHC_PORTSC_OFFSET 0x400 // Port Status and Control Register Offset macro

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