| /dports/devel/llvm13/llvm-project-13.0.1.src/lldb/test/API/functionalities/postmortem/minidump/ |
| H A D | TestMiniDump.py | 139 self.assertIn(name, function_name)
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/edk2/MdeModulePkg/Bus/Pci/XhciDxe/ |
| H A D | XhciReg.h | 139 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/emulators/qemu/qemu-6.2.0/roms/edk2/MdeModulePkg/Bus/Pci/XhciDxe/ |
| H A D | XhciReg.h | 139 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/edk2/MdeModulePkg/Bus/Pci/XhciDxe/ |
| H A D | XhciReg.h | 139 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/edk2/MdeModulePkg/Bus/Pci/XhciDxe/ |
| H A D | XhciReg.h | 139 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/sysutils/uefi-edk2-qemu/edk2-edk2-stable201911/MdeModulePkg/Bus/Pci/XhciDxe/ |
| H A D | XhciReg.h | 139 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/Vlv2TbltDevicePkg/Override/MdeModulePkg/Bus/Pci/XhciDxe/ |
| H A D | XhciReg.h | 143 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/sysutils/uefi-edk2-bhyve/edk2-edk2-stable202102/MdeModulePkg/Bus/Pci/XhciDxe/ |
| H A D | XhciReg.h | 139 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/MdeModulePkg/Bus/Pci/XhciDxe/ |
| H A D | XhciReg.h | 143 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/edk2/MdeModulePkg/Bus/Pci/XhciDxe/ |
| H A D | XhciReg.h | 139 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/edk2/MdeModulePkg/Bus/Pci/XhciDxe/ |
| H A D | XhciReg.h | 139 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/sysutils/uefi-edk2-bhyve-csm/uefi-edk2-aa8d718/MdeModulePkg/Bus/Pci/XhciPei/ |
| H A D | XhciReg.h | 58 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/edk2/MdeModulePkg/Bus/Pci/XhciPei/ |
| H A D | XhciReg.h | 51 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/edk2/MdeModulePkg/Bus/Pci/XhciPei/ |
| H A D | XhciReg.h | 51 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/sysutils/uefi-edk2-bhyve/edk2-edk2-stable202102/MdeModulePkg/Bus/Pci/XhciPei/ |
| H A D | XhciReg.h | 51 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/sysutils/uefi-edk2-qemu/edk2-edk2-stable201911/MdeModulePkg/Bus/Pci/XhciPei/ |
| H A D | XhciReg.h | 51 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/edk2/MdeModulePkg/Bus/Pci/XhciPei/ |
| H A D | XhciReg.h | 51 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/edk2/MdeModulePkg/Bus/Pci/XhciPei/ |
| H A D | XhciReg.h | 51 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/emulators/qemu/qemu-6.2.0/roms/edk2/MdeModulePkg/Bus/Pci/XhciPei/ |
| H A D | XhciReg.h | 51 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/edk2/MdeModulePkg/Bus/Pci/XhciPei/ |
| H A D | XhciReg.h | 51 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/edk2/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/ |
| H A D | DebugCommunicationLibUsb3Internal.h | 71 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/emulators/qemu/qemu-6.2.0/roms/edk2/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/ |
| H A D | DebugCommunicationLibUsb3Internal.h | 71 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/edk2/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/ |
| H A D | DebugCommunicationLibUsb3Internal.h | 71 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/edk2/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/ |
| H A D | DebugCommunicationLibUsb3Internal.h | 71 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/edk2/SourceLevelDebugPkg/Library/DebugCommunicationLibUsb3/ |
| H A D | DebugCommunicationLibUsb3Internal.h | 71 #define XHC_USBCMD_RESET BIT1 // Host Controller Reset macro
|