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/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp1/sdr_lib/
H A Dtx_chain_hb.v35 output wire [15:0] debug, output [15:0] hb_i_out port
40 wire [15:0] hb_i_out, hb_q_out; net