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Searched defs:m_axi_arcache (Results 1 – 18 of 18) sorted by relevance

/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/vivado_ipi/axi_dmac/
H A Dsrc_axi_mm.v78 output [ 3:0] m_axi_arcache, port
H A Drequest_arb.v92 output [ 3:0] m_axi_arcache, port
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/axi/
H A Daxi_dma_master.v60 …output [3 : 0] m_axi_arcache, // Memory type. This signal indicates how transactions are required… port
H A Daxi_dma_fifo.v71 …output [3 : 0] m_axi_arcache, // Memory type. This signal indicates how transactions are required… port
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_axi_ram_fifo/
H A Drfnoc_block_axi_ram_fifo.v165 …output wire [ NUM_PORTS*4-1:0] m_axi_arcache, // Memory type. This signal indicates how t… port
H A Daxi_ram_fifo.v144 …output wire [ 3:0] m_axi_arcache, // Memory type. This signal indicates how transacti… port
H A Drfnoc_block_axi_ram_fifo_tb.sv147 wire [ NUM_PORTS*4-1:0] m_axi_arcache; // Unused master output net
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_replay/
H A Drfnoc_block_replay.v121 output wire [ (NUM_PORTS*4)-1:0] m_axi_arcache, port
H A Drfnoc_block_replay_tb.sv184 wire [ NUM_PORTS*4-1:0] m_axi_arcache; // Unused master output net
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/e320/
H A De320_rfnoc_image_core.v78 output wire [ 8-1:0] m_axi_arcache, port
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/
H A Dn300_bist_image_core.v78 output wire [ 16-1:0] m_axi_arcache, port
H A Dn300_rfnoc_image_core.v78 output wire [ 16-1:0] m_axi_arcache, port
H A Dn320_bist_image_core.v96 output wire [ 16-1:0] m_axi_arcache, port
H A Dn310_bist_image_core.v96 output wire [ 16-1:0] m_axi_arcache, port
H A Dn320_rfnoc_image_core.v96 output wire [ 16-1:0] m_axi_arcache, port
H A Dn310_rfnoc_image_core.v96 output wire [ 16-1:0] m_axi_arcache, port
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/x300/
H A Dx310_rfnoc_image_core.v97 output wire [ 16-1:0] m_axi_arcache, port
H A Dx300_rfnoc_image_core.v97 output wire [ 16-1:0] m_axi_arcache, port