/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/include/ |
H A D | IxNpeMhMacros_p.h | 199 #define IX_NPEMH_REGISTER_READ(registerAddress, value) \ argument 210 #define IX_NPEMH_REGISTER_READ_BITS(registerAddress, value, mask) \ argument 221 #define IX_NPEMH_REGISTER_WRITE(registerAddress, value) \ argument 232 #define IX_NPEMH_REGISTER_WRITE_BITS(registerAddress, value, mask) \ argument 252 #define IX_NPEMH_REGISTER_READ(registerAddress, value) \ argument 263 #define IX_NPEMH_REGISTER_READ_BITS(registerAddress, value, mask) \ argument 274 #define IX_NPEMH_REGISTER_WRITE(registerAddress, value) \ argument 285 #define IX_NPEMH_REGISTER_WRITE_BITS(registerAddress, value, mask) \ argument
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H A D | IxQMgrAqmIf_p.h | 678 volatile UINT32 *registerAddress; in ixQMgrAqmIfRegisterBitCheck() local 776 volatile UINT32 *registerAddress; in ixQMgrAqmIfQRegisterBitsRead() local
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/include/ |
H A D | IxNpeMhMacros_p.h | 199 #define IX_NPEMH_REGISTER_READ(registerAddress, value) \ argument 210 #define IX_NPEMH_REGISTER_READ_BITS(registerAddress, value, mask) \ argument 221 #define IX_NPEMH_REGISTER_WRITE(registerAddress, value) \ argument 232 #define IX_NPEMH_REGISTER_WRITE_BITS(registerAddress, value, mask) \ argument 252 #define IX_NPEMH_REGISTER_READ(registerAddress, value) \ argument 263 #define IX_NPEMH_REGISTER_READ_BITS(registerAddress, value, mask) \ argument 274 #define IX_NPEMH_REGISTER_WRITE(registerAddress, value) \ argument 285 #define IX_NPEMH_REGISTER_WRITE_BITS(registerAddress, value, mask) \ argument
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H A D | IxQMgrAqmIf_p.h | 678 volatile UINT32 *registerAddress; in ixQMgrAqmIfRegisterBitCheck() local 776 volatile UINT32 *registerAddress; in ixQMgrAqmIfQRegisterBitsRead() local
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/include/ |
H A D | IxNpeMhMacros_p.h | 199 #define IX_NPEMH_REGISTER_READ(registerAddress, value) \ argument 210 #define IX_NPEMH_REGISTER_READ_BITS(registerAddress, value, mask) \ argument 221 #define IX_NPEMH_REGISTER_WRITE(registerAddress, value) \ argument 232 #define IX_NPEMH_REGISTER_WRITE_BITS(registerAddress, value, mask) \ argument 252 #define IX_NPEMH_REGISTER_READ(registerAddress, value) \ argument 263 #define IX_NPEMH_REGISTER_READ_BITS(registerAddress, value, mask) \ argument 274 #define IX_NPEMH_REGISTER_WRITE(registerAddress, value) \ argument 285 #define IX_NPEMH_REGISTER_WRITE_BITS(registerAddress, value, mask) \ argument
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H A D | IxQMgrAqmIf_p.h | 678 volatile UINT32 *registerAddress; in ixQMgrAqmIfRegisterBitCheck() local 776 volatile UINT32 *registerAddress; in ixQMgrAqmIfQRegisterBitsRead() local
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/include/ |
H A D | IxNpeMhMacros_p.h | 199 #define IX_NPEMH_REGISTER_READ(registerAddress, value) \ argument 210 #define IX_NPEMH_REGISTER_READ_BITS(registerAddress, value, mask) \ argument 221 #define IX_NPEMH_REGISTER_WRITE(registerAddress, value) \ argument 232 #define IX_NPEMH_REGISTER_WRITE_BITS(registerAddress, value, mask) \ argument 252 #define IX_NPEMH_REGISTER_READ(registerAddress, value) \ argument 263 #define IX_NPEMH_REGISTER_READ_BITS(registerAddress, value, mask) \ argument 274 #define IX_NPEMH_REGISTER_WRITE(registerAddress, value) \ argument 285 #define IX_NPEMH_REGISTER_WRITE_BITS(registerAddress, value, mask) \ argument
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H A D | IxQMgrAqmIf_p.h | 678 volatile UINT32 *registerAddress; in ixQMgrAqmIfRegisterBitCheck() local 776 volatile UINT32 *registerAddress; in ixQMgrAqmIfQRegisterBitsRead() local
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/include/ |
H A D | IxNpeMhMacros_p.h | 199 #define IX_NPEMH_REGISTER_READ(registerAddress, value) \ argument 210 #define IX_NPEMH_REGISTER_READ_BITS(registerAddress, value, mask) \ argument 221 #define IX_NPEMH_REGISTER_WRITE(registerAddress, value) \ argument 232 #define IX_NPEMH_REGISTER_WRITE_BITS(registerAddress, value, mask) \ argument 252 #define IX_NPEMH_REGISTER_READ(registerAddress, value) \ argument 263 #define IX_NPEMH_REGISTER_READ_BITS(registerAddress, value, mask) \ argument 274 #define IX_NPEMH_REGISTER_WRITE(registerAddress, value) \ argument 285 #define IX_NPEMH_REGISTER_WRITE_BITS(registerAddress, value, mask) \ argument
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H A D | IxQMgrAqmIf_p.h | 678 volatile UINT32 *registerAddress; in ixQMgrAqmIfRegisterBitCheck() local 776 volatile UINT32 *registerAddress; in ixQMgrAqmIfQRegisterBitsRead() local
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/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/include/ |
H A D | IxNpeMhMacros_p.h | 199 #define IX_NPEMH_REGISTER_READ(registerAddress, value) \ argument 210 #define IX_NPEMH_REGISTER_READ_BITS(registerAddress, value, mask) \ argument 221 #define IX_NPEMH_REGISTER_WRITE(registerAddress, value) \ argument 232 #define IX_NPEMH_REGISTER_WRITE_BITS(registerAddress, value, mask) \ argument 252 #define IX_NPEMH_REGISTER_READ(registerAddress, value) \ argument 263 #define IX_NPEMH_REGISTER_READ_BITS(registerAddress, value, mask) \ argument 274 #define IX_NPEMH_REGISTER_WRITE(registerAddress, value) \ argument 285 #define IX_NPEMH_REGISTER_WRITE_BITS(registerAddress, value, mask) \ argument
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H A D | IxQMgrAqmIf_p.h | 678 volatile UINT32 *registerAddress; in ixQMgrAqmIfRegisterBitCheck() local 776 volatile UINT32 *registerAddress; in ixQMgrAqmIfQRegisterBitsRead() local
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/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/include/ |
H A D | IxNpeMhMacros_p.h | 199 #define IX_NPEMH_REGISTER_READ(registerAddress, value) \ argument 210 #define IX_NPEMH_REGISTER_READ_BITS(registerAddress, value, mask) \ argument 221 #define IX_NPEMH_REGISTER_WRITE(registerAddress, value) \ argument 232 #define IX_NPEMH_REGISTER_WRITE_BITS(registerAddress, value, mask) \ argument 252 #define IX_NPEMH_REGISTER_READ(registerAddress, value) \ argument 263 #define IX_NPEMH_REGISTER_READ_BITS(registerAddress, value, mask) \ argument 274 #define IX_NPEMH_REGISTER_WRITE(registerAddress, value) \ argument 285 #define IX_NPEMH_REGISTER_WRITE_BITS(registerAddress, value, mask) \ argument
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H A D | IxQMgrAqmIf_p.h | 678 volatile UINT32 *registerAddress; in ixQMgrAqmIfRegisterBitCheck() local 776 volatile UINT32 *registerAddress; in ixQMgrAqmIfQRegisterBitsRead() local
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/dports/games/libretro-play/Play--3cd0a367b5e24c061a6310c68c9fa7f6b531ebd4/tools/SpuTest/ |
H A D | Test.cpp | 44 uint32 CTest::GetCoreAddress(unsigned int coreIndex, uint32 registerAddress) in GetCoreAddress() 52 void CTest::SetCoreAddress(unsigned int coreIndex, uint32 registerAddress, uint32 targetAddress) in SetCoreAddress() 65 …t32 CTest::GetVoiceAddress(unsigned int coreIndex, unsigned int voiceIndex, uint32 registerAddress) in GetVoiceAddress() 71 void CTest::SetVoiceAddress(unsigned int coreIndex, unsigned int voiceIndex, uint32 registerAddress… in SetVoiceAddress()
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/ |
H A D | IxQMgrAqmIf.c | 329 volatile UINT32 *registerAddress; in ixQMgrAqmIfQRegisterBitsWrite() local 468 volatile UINT32 *registerAddress; in ixQMgrAqmIfQInterruptEnable() local 490 volatile UINT32 *registerAddress; in ixQMgrAqmIfQInterruptDisable() local 639 volatile UINT32 *registerAddress; in ixQMgrAqmIfIntSrcSelReg0Bit3Set() local
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/ |
H A D | IxQMgrAqmIf.c | 329 volatile UINT32 *registerAddress; in ixQMgrAqmIfQRegisterBitsWrite() local 468 volatile UINT32 *registerAddress; in ixQMgrAqmIfQInterruptEnable() local 490 volatile UINT32 *registerAddress; in ixQMgrAqmIfQInterruptDisable() local 639 volatile UINT32 *registerAddress; in ixQMgrAqmIfIntSrcSelReg0Bit3Set() local
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/ |
H A D | IxQMgrAqmIf.c | 329 volatile UINT32 *registerAddress; in ixQMgrAqmIfQRegisterBitsWrite() local 468 volatile UINT32 *registerAddress; in ixQMgrAqmIfQInterruptEnable() local 490 volatile UINT32 *registerAddress; in ixQMgrAqmIfQInterruptDisable() local 639 volatile UINT32 *registerAddress; in ixQMgrAqmIfIntSrcSelReg0Bit3Set() local
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/ |
H A D | IxQMgrAqmIf.c | 329 volatile UINT32 *registerAddress; in ixQMgrAqmIfQRegisterBitsWrite() local 468 volatile UINT32 *registerAddress; in ixQMgrAqmIfQInterruptEnable() local 490 volatile UINT32 *registerAddress; in ixQMgrAqmIfQInterruptDisable() local 639 volatile UINT32 *registerAddress; in ixQMgrAqmIfIntSrcSelReg0Bit3Set() local
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/ |
H A D | IxQMgrAqmIf.c | 329 volatile UINT32 *registerAddress; in ixQMgrAqmIfQRegisterBitsWrite() local 468 volatile UINT32 *registerAddress; in ixQMgrAqmIfQInterruptEnable() local 490 volatile UINT32 *registerAddress; in ixQMgrAqmIfQInterruptDisable() local 639 volatile UINT32 *registerAddress; in ixQMgrAqmIfIntSrcSelReg0Bit3Set() local
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/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/ |
H A D | IxQMgrAqmIf.c | 329 volatile UINT32 *registerAddress; in ixQMgrAqmIfQRegisterBitsWrite() local 468 volatile UINT32 *registerAddress; in ixQMgrAqmIfQInterruptEnable() local 490 volatile UINT32 *registerAddress; in ixQMgrAqmIfQInterruptDisable() local 639 volatile UINT32 *registerAddress; in ixQMgrAqmIfIntSrcSelReg0Bit3Set() local
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/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/arm/cpu/ixp/npe/ |
H A D | IxQMgrAqmIf.c | 329 volatile UINT32 *registerAddress; in ixQMgrAqmIfQRegisterBitsWrite() local 468 volatile UINT32 *registerAddress; in ixQMgrAqmIfQInterruptEnable() local 490 volatile UINT32 *registerAddress; in ixQMgrAqmIfQInterruptDisable() local 639 volatile UINT32 *registerAddress; in ixQMgrAqmIfIntSrcSelReg0Bit3Set() local
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/dports/games/openrct2/OpenRCT2-0.3.5.1/test/testpaint/ |
H A D | Hook.cpp | 45 uintptr_t registerAddress = (uintptr_t)&gHookRegisters; in hookfunc() local
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/dports/security/keybase/client-v5.7.1/protocol/json/keybase1/ |
H A D | cryptocurrency.json | 26 "registerAddress": { object
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/dports/lang/intel-compute-runtime/compute-runtime-21.52.22081/opencl/source/device_queue/ |
H A D | device_queue_hw_base.inl | 207 constexpr uint32_t registerAddress = 0x2248u; local
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