| /dports/devel/binutils/binutils-2.37/include/opcode/ |
| H A D | tic4x.h | 38 REG_R4, REG_R5, REG_R6, REG_R7, enumerator
82 {"f5", REG_R5},
83 {"r5", REG_R5},
|
| /dports/lang/go-devel/go-becaeea1199b875bc24800fa88f2f4fea119bf78/src/cmd/internal/obj/arm64/ |
| H A D | a.out.go | 50 REG_R5 const
264 REG_R5: 5,
|
| /dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/config/bfin/ |
| H A D | bfin.h | 436 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
645 : (REGNO) == REG_R5 ? D5REGS \
|
| /dports/lang/gcc9/gcc-9.4.0/gcc/config/bfin/ |
| H A D | bfin.h | 436 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
645 : (REGNO) == REG_R5 ? D5REGS \
|
| /dports/devel/avr-gcc/gcc-10.2.0/gcc/config/bfin/ |
| H A D | bfin.h | 436 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
645 : (REGNO) == REG_R5 ? D5REGS \
|
| /dports/lang/gcc11-devel/gcc-11-20211009/gcc/config/bfin/ |
| H A D | bfin.h | 436 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
645 : (REGNO) == REG_R5 ? D5REGS \
|
| /dports/lang/gcc10-devel/gcc-10-20211008/gcc/config/bfin/ |
| H A D | bfin.h | 436 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
645 : (REGNO) == REG_R5 ? D5REGS \
|
| /dports/lang/gcc12-devel/gcc-12-20211205/gcc/config/bfin/ |
| H A D | bfin.h | 436 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
645 : (REGNO) == REG_R5 ? D5REGS \
|
| /dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/config/bfin/ |
| H A D | bfin.h | 436 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
645 : (REGNO) == REG_R5 ? D5REGS \
|
| /dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/config/bfin/ |
| H A D | bfin.h | 436 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
645 : (REGNO) == REG_R5 ? D5REGS \
|
| /dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/config/bfin/ |
| H A D | bfin.h | 436 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
645 : (REGNO) == REG_R5 ? D5REGS \
|
| /dports/devel/riscv64-gcc/gcc-8.3.0/gcc/config/bfin/ |
| H A D | bfin.h | 436 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
645 : (REGNO) == REG_R5 ? D5REGS \
|
| /dports/misc/cxx_atomics_pic/gcc-11.2.0/gcc/config/bfin/ |
| H A D | bfin.h | 436 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
645 : (REGNO) == REG_R5 ? D5REGS \
|
| /dports/lang/gcc10/gcc-10.3.0/gcc/config/bfin/ |
| H A D | bfin.h | 436 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
645 : (REGNO) == REG_R5 ? D5REGS \
|
| /dports/lang/gcc8/gcc-8.5.0/gcc/config/bfin/ |
| H A D | bfin.h | 436 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
645 : (REGNO) == REG_R5 ? D5REGS \
|
| /dports/lang/gcc11/gcc-11.2.0/gcc/config/bfin/ |
| H A D | bfin.h | 436 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
645 : (REGNO) == REG_R5 ? D5REGS \
|
| /dports/lang/gcc9-aux/gcc-9.1.0/gcc/config/bfin/ |
| H A D | bfin.h | 436 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
645 : (REGNO) == REG_R5 ? D5REGS \
|
| /dports/lang/gcc9-devel/gcc-9-20211007/gcc/config/bfin/ |
| H A D | bfin.h | 436 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
645 : (REGNO) == REG_R5 ? D5REGS \
|
| /dports/lang/go-devel/go-dragonfly-amd64-bootstrap/src/cmd/internal/obj/mips/ |
| H A D | a.out.go | 54 REG_R5 const
|
| /dports/devel/libfirm/libfirm-1.21.0/ir/be/arm/ |
| H A D | gen_arm_regalloc_if.c | 334 REG_R5,
|
| /dports/net/google-cloud-sdk-app-engine-go/platform/google_appengine/goroot-1.9/src/cmd/internal/obj/s390x/ |
| H A D | objz.go | 409 q.To.Reg = REG_R5
416 q.To.Reg = REG_R5
674 p.To.Reg = REG_R5
|
| /dports/lang/gnat_util/gcc-6-20180516/gcc/config/bfin/ |
| H A D | bfin.h | 442 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
651 : (REGNO) == REG_R5 ? D5REGS \
|
| /dports/lang/gcc48/gcc-4.8.5/gcc/config/bfin/ |
| H A D | bfin.h | 440 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
649 : (REGNO) == REG_R5 ? D5REGS \
|
| /dports/devel/mingw32-gcc/gcc-4.8.1/gcc/config/bfin/ |
| H A D | bfin.h | 440 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
649 : (REGNO) == REG_R5 ? D5REGS \
|
| /dports/devel/arm-none-eabi-gcc492/gcc-4.9.2/gcc/config/bfin/ |
| H A D | bfin.h | 440 { REG_R0, REG_R1, REG_R2, REG_R3, REG_R7, REG_R6, REG_R5, REG_R4, \
649 : (REGNO) == REG_R5 ? D5REGS \
|