| /dports/sysutils/u-boot-rpi-arm64/u-boot-2021.07/drivers/clk/mediatek/ |
| H A D | clk-mt7629.c | 33 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
42 .pcwbits = _pcwbits, \
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| H A D | clk-mt8512.c | 22 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
32 .pcwbits = _pcwbits, \
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| H A D | clk-mt8516.c | 21 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
30 .pcwbits = _pcwbits, \
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| H A D | clk-mt7622.c | 33 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
42 .pcwbits = _pcwbits, \
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| /dports/sysutils/u-boot-rpi3/u-boot-2021.07/drivers/clk/mediatek/ |
| H A D | clk-mt7622.c | 33 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
42 .pcwbits = _pcwbits, \
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| H A D | clk-mt7629.c | 33 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
42 .pcwbits = _pcwbits, \
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| H A D | clk-mt8512.c | 22 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
32 .pcwbits = _pcwbits, \
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| H A D | clk-mt8516.c | 21 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
30 .pcwbits = _pcwbits, \
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| /dports/sysutils/u-boot-rock-pi-4/u-boot-2021.07/drivers/clk/mediatek/ |
| H A D | clk-mt7622.c | 33 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
42 .pcwbits = _pcwbits, \
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| H A D | clk-mt8516.c | 21 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
30 .pcwbits = _pcwbits, \
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| H A D | clk-mt7629.c | 33 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
42 .pcwbits = _pcwbits, \
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| H A D | clk-mt8512.c | 22 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
32 .pcwbits = _pcwbits, \
|
| /dports/sysutils/u-boot-rpi2/u-boot-2021.07/drivers/clk/mediatek/ |
| H A D | clk-mt7622.c | 33 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
42 .pcwbits = _pcwbits, \
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| H A D | clk-mt7629.c | 33 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
42 .pcwbits = _pcwbits, \
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| H A D | clk-mt8516.c | 21 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
30 .pcwbits = _pcwbits, \
|
| /dports/sysutils/u-boot-rock64/u-boot-2021.07/drivers/clk/mediatek/ |
| H A D | clk-mt8512.c | 22 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
32 .pcwbits = _pcwbits, \
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| H A D | clk-mt7622.c | 33 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
42 .pcwbits = _pcwbits, \
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| H A D | clk-mt7629.c | 33 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
42 .pcwbits = _pcwbits, \
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| H A D | clk-mt8516.c | 21 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
30 .pcwbits = _pcwbits, \
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt7623.c | 26 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
35 .pcwbits = _pcwbits, \
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt7623.c | 26 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
35 .pcwbits = _pcwbits, \
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt7623.c | 26 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
35 .pcwbits = _pcwbits, \
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/drivers/clk/mediatek/ |
| H A D | clk-mt8183.c | 22 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _rst_bar_mask, _pcwbits, \ argument
32 .pcwbits = _pcwbits, \
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/drivers/clk/mediatek/ |
| H A D | clk-mt8183.c | 22 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _rst_bar_mask, _pcwbits, \ argument
32 .pcwbits = _pcwbits, \
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/drivers/clk/mediatek/ |
| H A D | clk-mt8183.c | 22 #define PLL(_id, _reg, _pwr_reg, _en_mask, _flags, _rst_bar_mask, _pcwbits, \ argument
32 .pcwbits = _pcwbits, \
|