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Searched refs:ADC_DR_DATA (Results 1 – 15 of 15) sorted by relevance

/dports/security/py-pyvex/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/
H A Dstm32l1xx_ll_adc.h4561 return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
4576 return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
4591 return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
4606 return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
4621 return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
/dports/devel/py-cle/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/
H A Dstm32l1xx_ll_adc.h4561 return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA)); in LL_ADC_REG_ReadConversionData32()
4576 return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA)); in LL_ADC_REG_ReadConversionData12()
4591 return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA)); in LL_ADC_REG_ReadConversionData10()
4606 return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA)); in LL_ADC_REG_ReadConversionData8()
4621 return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA)); in LL_ADC_REG_ReadConversionData6()
/dports/security/py-ailment/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/
H A Dstm32l1xx_ll_adc.h4561 return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA)); in LL_ADC_REG_ReadConversionData32()
4576 return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA)); in LL_ADC_REG_ReadConversionData12()
4591 return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA)); in LL_ADC_REG_ReadConversionData10()
4606 return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA)); in LL_ADC_REG_ReadConversionData8()
4621 return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA)); in LL_ADC_REG_ReadConversionData6()
/dports/security/py-angr/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/
H A Dstm32l1xx_ll_adc.h4561 return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA)); in LL_ADC_REG_ReadConversionData32()
4576 return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA)); in LL_ADC_REG_ReadConversionData12()
4591 return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA)); in LL_ADC_REG_ReadConversionData10()
4606 return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA)); in LL_ADC_REG_ReadConversionData8()
4621 return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA)); in LL_ADC_REG_ReadConversionData6()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f37x/
H A Dstm32f37x.h1308 #define ADC_DR_DATA ((uint32_t)0x0000FFFF) /*!< Regular data */ macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f0xx/
H A Dstm32f0xx.h1288 #define ADC_DR_DATA ((uint32_t)0x0000FFFF) /*!< Regular data */ macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f37x/
H A Dstm32f37x.h1308 #define ADC_DR_DATA ((uint32_t)0x0000FFFF) /*!< Regular data */ macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f10x/
H A Dstm32f10x.h3628 #define ADC_DR_DATA ((uint32_t)0x0000FFFF) /*!<Regular data */ macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f10x/
H A Dstm32f10x.h3628 #define ADC_DR_DATA ((uint32_t)0x0000FFFF) /*!<Regular data */ macro
/dports/security/py-pyvex/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/
H A Dstm32l152xe.h1605 #define ADC_DR_DATA ADC_DR_DATA_Msk /*!< ADC group regul… macro
/dports/devel/py-cle/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/
H A Dstm32l152xe.h1605 #define ADC_DR_DATA ADC_DR_DATA_Msk /*!< ADC group regul… macro
/dports/security/py-angr/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/
H A Dstm32l152xe.h1605 #define ADC_DR_DATA ADC_DR_DATA_Msk /*!< ADC group regul… macro
/dports/security/py-ailment/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/
H A Dstm32l152xe.h1605 #define ADC_DR_DATA ADC_DR_DATA_Msk /*!< ADC group regul… macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f4xx/
H A Dstm32f4xx.h2497 #define ADC_DR_DATA ((uint32_t)0x0000FFFF) /*!<Regular data */ macro
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f4xx/
H A Dstm32f4xx.h2497 #define ADC_DR_DATA ((uint32_t)0x0000FFFF) /*!<Regular data */ macro