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/dports/devel/binutils/binutils-2.37/include/opcode/
H A Dh8300.h395 #define FROM_DISP16 12, B30 | DISPREG
397 #define FROM_DISP16B 13, B30 | DISPREG
398 #define FROM_DISP16W 14, B30 | DISPREG
399 #define FROM_DISP16L 15, B30 | DISPREG
403 #define FROM_ABS16 4, B30 | IGNORE
408 #define TO_IND_MOV 0, RDIND | B30
418 #define TO_DISP2_MOV B30 | B20 | DISP2DST, DSTDISPREG | B30
419 #define TO_DISP16 12, B30 | DSTDISPREG
427 #define TO_ABS16 4, B30 | IGNORE
971 … 0, NAME, {{DISP2SRC, E}}, {{PREFIX, B30 | B21 | DISP2SRC, 6, 9, B30 | DISPREG, B31 | IGNORE, OP…
[all …]
/dports/lang/gnatdroid-binutils/binutils-2.27/include/opcode/
H A Dh8300.h395 #define FROM_DISP16 12, B30 | DISPREG
397 #define FROM_DISP16B 13, B30 | DISPREG
398 #define FROM_DISP16W 14, B30 | DISPREG
399 #define FROM_DISP16L 15, B30 | DISPREG
403 #define FROM_ABS16 4, B30 | IGNORE
408 #define TO_IND_MOV 0, RDIND | B30
418 #define TO_DISP2_MOV B30 | B20 | DISP2DST, DSTDISPREG | B30
419 #define TO_DISP16 12, B30 | DSTDISPREG
427 #define TO_ABS16 4, B30 | IGNORE
971 … 0, NAME, {{DISP2SRC, E}}, {{PREFIX, B30 | B21 | DISP2SRC, 6, 9, B30 | DISPREG, B31 | IGNORE, OP…
[all …]
/dports/lang/gnatdroid-binutils-x86/binutils-2.27/include/opcode/
H A Dh8300.h395 #define FROM_DISP16 12, B30 | DISPREG
397 #define FROM_DISP16B 13, B30 | DISPREG
398 #define FROM_DISP16W 14, B30 | DISPREG
399 #define FROM_DISP16L 15, B30 | DISPREG
403 #define FROM_ABS16 4, B30 | IGNORE
408 #define TO_IND_MOV 0, RDIND | B30
418 #define TO_DISP2_MOV B30 | B20 | DISP2DST, DSTDISPREG | B30
419 #define TO_DISP16 12, B30 | DSTDISPREG
427 #define TO_ABS16 4, B30 | IGNORE
971 … 0, NAME, {{DISP2SRC, E}}, {{PREFIX, B30 | B21 | DISP2SRC, 6, 9, B30 | DISPREG, B31 | IGNORE, OP…
[all …]
/dports/devel/arm-elf-binutils/binutils-2.37/include/opcode/
H A Dh8300.h395 #define FROM_DISP16 12, B30 | DISPREG
397 #define FROM_DISP16B 13, B30 | DISPREG
398 #define FROM_DISP16W 14, B30 | DISPREG
399 #define FROM_DISP16L 15, B30 | DISPREG
403 #define FROM_ABS16 4, B30 | IGNORE
408 #define TO_IND_MOV 0, RDIND | B30
418 #define TO_DISP2_MOV B30 | B20 | DISP2DST, DSTDISPREG | B30
419 #define TO_DISP16 12, B30 | DSTDISPREG
427 #define TO_ABS16 4, B30 | IGNORE
971 … 0, NAME, {{DISP2SRC, E}}, {{PREFIX, B30 | B21 | DISP2SRC, 6, 9, B30 | DISPREG, B31 | IGNORE, OP…
[all …]
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/include/opcode/
H A Dh8300.h396 #define FROM_DISP16 12, B30 | DISPREG
398 #define FROM_DISP16B 13, B30 | DISPREG
399 #define FROM_DISP16W 14, B30 | DISPREG
400 #define FROM_DISP16L 15, B30 | DISPREG
404 #define FROM_ABS16 4, B30 | IGNORE
409 #define TO_IND_MOV 0, RDIND | B30
419 #define TO_DISP2_MOV B30 | B20 | DISP2DST, DSTDISPREG | B30
420 #define TO_DISP16 12, B30 | DSTDISPREG
428 #define TO_ABS16 4, B30 | IGNORE
972 … 0, NAME, {{DISP2SRC, E}}, {{PREFIX, B30 | B21 | DISP2SRC, 6, 9, B30 | DISPREG, B31 | IGNORE, OP…
[all …]
/dports/devel/gnulibiberty/binutils-2.37/include/opcode/
H A Dh8300.h395 #define FROM_DISP16 12, B30 | DISPREG
397 #define FROM_DISP16B 13, B30 | DISPREG
398 #define FROM_DISP16W 14, B30 | DISPREG
399 #define FROM_DISP16L 15, B30 | DISPREG
403 #define FROM_ABS16 4, B30 | IGNORE
408 #define TO_IND_MOV 0, RDIND | B30
418 #define TO_DISP2_MOV B30 | B20 | DISP2DST, DSTDISPREG | B30
419 #define TO_DISP16 12, B30 | DSTDISPREG
427 #define TO_ABS16 4, B30 | IGNORE
971 … 0, NAME, {{DISP2SRC, E}}, {{PREFIX, B30 | B21 | DISP2SRC, 6, 9, B30 | DISPREG, B31 | IGNORE, OP…
[all …]
/dports/devel/avr-gdb/gdb-7.3.1/include/opcode/
H A Dh8300.h397 #define FROM_DISP16 12, B30 | DISPREG
399 #define FROM_DISP16B 13, B30 | DISPREG
400 #define FROM_DISP16W 14, B30 | DISPREG
401 #define FROM_DISP16L 15, B30 | DISPREG
405 #define FROM_ABS16 4, B30 | IGNORE
410 #define TO_IND_MOV 0, RDIND | B30
420 #define TO_DISP2_MOV B30 | B20 | DISP2DST, DSTDISPREG | B30
421 #define TO_DISP16 12, B30 | DSTDISPREG
429 #define TO_ABS16 4, B30 | IGNORE
973 … 0, NAME, {{DISP2SRC, E}}, {{PREFIX, B30 | B21 | DISP2SRC, 6, 9, B30 | DISPREG, B31 | IGNORE, OP…
[all …]
/dports/devel/arm-none-eabi-newlib/newlib-2.4.0/include/opcode/
H A Dh8300.h395 #define FROM_DISP16 12, B30 | DISPREG
397 #define FROM_DISP16B 13, B30 | DISPREG
398 #define FROM_DISP16W 14, B30 | DISPREG
399 #define FROM_DISP16L 15, B30 | DISPREG
403 #define FROM_ABS16 4, B30 | IGNORE
408 #define TO_IND_MOV 0, RDIND | B30
418 #define TO_DISP2_MOV B30 | B20 | DISP2DST, DSTDISPREG | B30
419 #define TO_DISP16 12, B30 | DSTDISPREG
427 #define TO_ABS16 4, B30 | IGNORE
971 … 0, NAME, {{DISP2SRC, E}}, {{PREFIX, B30 | B21 | DISP2SRC, 6, 9, B30 | DISPREG, B31 | IGNORE, OP…
[all …]
/dports/devel/gdb761/gdb-7.6.1/include/opcode/
H A Dh8300.h397 #define FROM_DISP16 12, B30 | DISPREG
399 #define FROM_DISP16B 13, B30 | DISPREG
400 #define FROM_DISP16W 14, B30 | DISPREG
401 #define FROM_DISP16L 15, B30 | DISPREG
405 #define FROM_ABS16 4, B30 | IGNORE
410 #define TO_IND_MOV 0, RDIND | B30
420 #define TO_DISP2_MOV B30 | B20 | DISP2DST, DSTDISPREG | B30
421 #define TO_DISP16 12, B30 | DSTDISPREG
429 #define TO_ABS16 4, B30 | IGNORE
973 … 0, NAME, {{DISP2SRC, E}}, {{PREFIX, B30 | B21 | DISP2SRC, 6, 9, B30 | DISPREG, B31 | IGNORE, OP…
[all …]
/dports/devel/gdb/gdb-11.1/include/opcode/
H A Dh8300.h395 #define FROM_DISP16 12, B30 | DISPREG
397 #define FROM_DISP16B 13, B30 | DISPREG
398 #define FROM_DISP16W 14, B30 | DISPREG
399 #define FROM_DISP16L 15, B30 | DISPREG
403 #define FROM_ABS16 4, B30 | IGNORE
408 #define TO_IND_MOV 0, RDIND | B30
418 #define TO_DISP2_MOV B30 | B20 | DISP2DST, DSTDISPREG | B30
419 #define TO_DISP16 12, B30 | DSTDISPREG
427 #define TO_ABS16 4, B30 | IGNORE
971 … 0, NAME, {{DISP2SRC, E}}, {{PREFIX, B30 | B21 | DISP2SRC, 6, 9, B30 | DISPREG, B31 | IGNORE, OP…
[all …]
/dports/lang/sdcc/sdcc-4.0.0/support/sdbinutils/include/opcode/
H A Dh8300.h395 #define FROM_DISP16 12, B30 | DISPREG
397 #define FROM_DISP16B 13, B30 | DISPREG
398 #define FROM_DISP16W 14, B30 | DISPREG
399 #define FROM_DISP16L 15, B30 | DISPREG
403 #define FROM_ABS16 4, B30 | IGNORE
408 #define TO_IND_MOV 0, RDIND | B30
418 #define TO_DISP2_MOV B30 | B20 | DISP2DST, DSTDISPREG | B30
419 #define TO_DISP16 12, B30 | DSTDISPREG
427 #define TO_ABS16 4, B30 | IGNORE
971 … 0, NAME, {{DISP2SRC, E}}, {{PREFIX, B30 | B21 | DISP2SRC, 6, 9, B30 | DISPREG, B31 | IGNORE, OP…
[all …]
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/include/opcode/
H A Dh8300.h397 #define FROM_DISP16 12, B30 | DISPREG
399 #define FROM_DISP16B 13, B30 | DISPREG
400 #define FROM_DISP16W 14, B30 | DISPREG
401 #define FROM_DISP16L 15, B30 | DISPREG
405 #define FROM_ABS16 4, B30 | IGNORE
410 #define TO_IND_MOV 0, RDIND | B30
420 #define TO_DISP2_MOV B30 | B20 | DISP2DST, DSTDISPREG | B30
421 #define TO_DISP16 12, B30 | DSTDISPREG
429 #define TO_ABS16 4, B30 | IGNORE
973 … 0, NAME, {{DISP2SRC, E}}, {{PREFIX, B30 | B21 | DISP2SRC, 6, 9, B30 | DISPREG, B31 | IGNORE, OP…
[all …]
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/include/opcode/
H A Dh8300.h396 #define FROM_DISP16 12, B30 | DISPREG
398 #define FROM_DISP16B 13, B30 | DISPREG
399 #define FROM_DISP16W 14, B30 | DISPREG
400 #define FROM_DISP16L 15, B30 | DISPREG
404 #define FROM_ABS16 4, B30 | IGNORE
409 #define TO_IND_MOV 0, RDIND | B30
419 #define TO_DISP2_MOV B30 | B20 | DISP2DST, DSTDISPREG | B30
420 #define TO_DISP16 12, B30 | DSTDISPREG
428 #define TO_ABS16 4, B30 | IGNORE
972 … 0, NAME, {{DISP2SRC, E}}, {{PREFIX, B30 | B21 | DISP2SRC, 6, 9, B30 | DISPREG, B31 | IGNORE, OP…
[all …]
/dports/devel/djgpp-binutils/binutils-2.17/include/opcode/
H A Dh8300.h397 #define FROM_DISP16 12, B30 | DISPREG
399 #define FROM_DISP16B 13, B30 | DISPREG
400 #define FROM_DISP16W 14, B30 | DISPREG
401 #define FROM_DISP16L 15, B30 | DISPREG
405 #define FROM_ABS16 4, B30 | IGNORE
410 #define TO_IND_MOV 0, RDIND | B30
420 #define TO_DISP2_MOV B30 | B20 | DISP2DST, DSTDISPREG | B30
421 #define TO_DISP16 12, B30 | DSTDISPREG
429 #define TO_ABS16 4, B30 | IGNORE
973 … 0, NAME, {{DISP2SRC, E}}, {{PREFIX, B30 | B21 | DISP2SRC, 6, 9, B30 | DISPREG, B31 | IGNORE, OP…
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/
H A Drename-disconnected-bug.ll22 br i1 undef, label %B30.1, label %B30.2
24 B30.1:
26 br label %B30.2
28 B30.2:
29 %v3 = phi <4 x float> [ %sub, %B30.1 ], [ %v2, %B20.2 ]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/
H A Drename-disconnected-bug.ll22 br i1 undef, label %B30.1, label %B30.2
24 B30.1:
26 br label %B30.2
28 B30.2:
29 %v3 = phi <4 x float> [ %sub, %B30.1 ], [ %v2, %B20.2 ]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/
H A Drename-disconnected-bug.ll22 br i1 undef, label %B30.1, label %B30.2
24 B30.1:
26 br label %B30.2
28 B30.2:
29 %v3 = phi <4 x float> [ %sub, %B30.1 ], [ %v2, %B20.2 ]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AMDGPU/
H A Drename-disconnected-bug.ll22 br i1 undef, label %B30.1, label %B30.2
24 B30.1:
26 br label %B30.2
28 B30.2:
29 %v3 = phi <4 x float> [ %sub, %B30.1 ], [ %v2, %B20.2 ]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/
H A Drename-disconnected-bug.ll22 br i1 undef, label %B30.1, label %B30.2
24 B30.1:
26 br label %B30.2
28 B30.2:
29 %v3 = phi <4 x float> [ %sub, %B30.1 ], [ %v2, %B20.2 ]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Drename-disconnected-bug.ll22 br i1 undef, label %B30.1, label %B30.2
24 B30.1:
26 br label %B30.2
28 B30.2:
29 %v3 = phi <4 x float> [ %sub, %B30.1 ], [ %v2, %B20.2 ]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/
H A Drename-disconnected-bug.ll22 br i1 undef, label %B30.1, label %B30.2
24 B30.1:
26 br label %B30.2
28 B30.2:
29 %v3 = phi <4 x float> [ %sub, %B30.1 ], [ %v2, %B20.2 ]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Drename-disconnected-bug.ll22 br i1 undef, label %B30.1, label %B30.2
24 B30.1:
26 br label %B30.2
28 B30.2:
29 %v3 = phi <4 x float> [ %sub, %B30.1 ], [ %v2, %B20.2 ]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Drename-disconnected-bug.ll22 br i1 undef, label %B30.1, label %B30.2
24 B30.1:
26 br label %B30.2
28 B30.2:
29 %v3 = phi <4 x float> [ %sub, %B30.1 ], [ %v2, %B20.2 ]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/
H A Drename-disconnected-bug.ll22 br i1 undef, label %B30.1, label %B30.2
24 B30.1:
26 br label %B30.2
28 B30.2:
29 %v3 = phi <4 x float> [ %sub, %B30.1 ], [ %v2, %B20.2 ]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AMDGPU/
H A Drename-disconnected-bug.ll22 br i1 undef, label %B30.1, label %B30.2
24 B30.1:
26 br label %B30.2
28 B30.2:
29 %v3 = phi <4 x float> [ %sub, %B30.1 ], [ %v2, %B20.2 ]

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