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Searched refs:CPUMIPSTLBContext (Results 1 – 25 of 40) sorted by relevance

12

/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/mips/
H A Dmachine.c204 VMSTATE_UINT32(nb_tlb, CPUMIPSTLBContext),
205 VMSTATE_UINT32(tlb_in_use, CPUMIPSTLBContext),
206 VMSTATE_TLB_ARRAY(mmu.r4k.tlb, CPUMIPSTLBContext, MIPS_TLB_MAX),
232 CPUMIPSTLBContext),
H A Dcpu.h16 typedef struct CPUMIPSTLBContext CPUMIPSTLBContext; typedef
627 CPUMIPSTLBContext *tlb;
/dports/emulators/qemu5/qemu-5.2.0/target/mips/
H A Dmachine.c204 VMSTATE_UINT32(nb_tlb, CPUMIPSTLBContext),
205 VMSTATE_UINT32(tlb_in_use, CPUMIPSTLBContext),
206 VMSTATE_TLB_ARRAY(mmu.r4k.tlb, CPUMIPSTLBContext, MIPS_TLB_MAX),
232 CPUMIPSTLBContext),
H A Dcpu.h12 typedef struct CPUMIPSTLBContext CPUMIPSTLBContext; typedef
1141 CPUMIPSTLBContext *tlb;
H A Dinternal.h116 struct CPUMIPSTLBContext { struct
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/mips/
H A Dmachine.c204 VMSTATE_UINT32(nb_tlb, CPUMIPSTLBContext),
205 VMSTATE_UINT32(tlb_in_use, CPUMIPSTLBContext),
206 VMSTATE_TLB_ARRAY(mmu.r4k.tlb, CPUMIPSTLBContext, MIPS_TLB_MAX),
232 CPUMIPSTLBContext),
H A Dcpu.h11 typedef struct CPUMIPSTLBContext CPUMIPSTLBContext; typedef
1111 CPUMIPSTLBContext *tlb;
/dports/emulators/qemu42/qemu-4.2.1/target/mips/
H A Dmachine.c204 VMSTATE_UINT32(nb_tlb, CPUMIPSTLBContext),
205 VMSTATE_UINT32(tlb_in_use, CPUMIPSTLBContext),
206 VMSTATE_TLB_ARRAY(mmu.r4k.tlb, CPUMIPSTLBContext, MIPS_TLB_MAX),
232 CPUMIPSTLBContext),
H A Dcpu.h11 typedef struct CPUMIPSTLBContext CPUMIPSTLBContext; typedef
1111 CPUMIPSTLBContext *tlb;
/dports/emulators/qemu-utils/qemu-4.2.1/target/mips/
H A Dmachine.c204 VMSTATE_UINT32(nb_tlb, CPUMIPSTLBContext),
205 VMSTATE_UINT32(tlb_in_use, CPUMIPSTLBContext),
206 VMSTATE_TLB_ARRAY(mmu.r4k.tlb, CPUMIPSTLBContext, MIPS_TLB_MAX),
232 CPUMIPSTLBContext),
H A Dcpu.h11 typedef struct CPUMIPSTLBContext CPUMIPSTLBContext; typedef
1111 CPUMIPSTLBContext *tlb;
H A Dinternal.h113 struct CPUMIPSTLBContext { struct
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/mips/sysemu/
H A Dmachine.c210 VMSTATE_UINT32(nb_tlb, CPUMIPSTLBContext),
211 VMSTATE_UINT32(tlb_in_use, CPUMIPSTLBContext),
212 VMSTATE_TLB_ARRAY(mmu.r4k.tlb, CPUMIPSTLBContext, MIPS_TLB_MAX),
238 CPUMIPSTLBContext),
/dports/emulators/qemu/qemu-6.2.0/target/mips/sysemu/
H A Dmachine.c210 VMSTATE_UINT32(nb_tlb, CPUMIPSTLBContext),
211 VMSTATE_UINT32(tlb_in_use, CPUMIPSTLBContext),
212 VMSTATE_TLB_ARRAY(mmu.r4k.tlb, CPUMIPSTLBContext, MIPS_TLB_MAX),
238 CPUMIPSTLBContext),
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/mips/
H A Dmachine.c222 VMSTATE_UINT32(nb_tlb, CPUMIPSTLBContext),
223 VMSTATE_UINT32(tlb_in_use, CPUMIPSTLBContext),
224 VMSTATE_TLB_ARRAY(mmu.r4k.tlb, CPUMIPSTLBContext, MIPS_TLB_MAX),
250 CPUMIPSTLBContext),
H A Dcpu.h16 typedef struct CPUMIPSTLBContext CPUMIPSTLBContext; typedef
1266 CPUMIPSTLBContext *tlb;
/dports/emulators/qemu60/qemu-6.0.0/target/mips/
H A Dmachine.c205 VMSTATE_UINT32(nb_tlb, CPUMIPSTLBContext),
206 VMSTATE_UINT32(tlb_in_use, CPUMIPSTLBContext),
207 VMSTATE_TLB_ARRAY(mmu.r4k.tlb, CPUMIPSTLBContext, MIPS_TLB_MAX),
233 CPUMIPSTLBContext),
H A Dcpu.h12 typedef struct CPUMIPSTLBContext CPUMIPSTLBContext; typedef
1154 CPUMIPSTLBContext *tlb;
H A Dinternal.h110 struct CPUMIPSTLBContext { struct
/dports/emulators/unicorn/unicorn-1.0.2/qemu/target-mips/
H A Dcpu.h42 typedef struct CPUMIPSTLBContext CPUMIPSTLBContext; typedef
43 struct CPUMIPSTLBContext { struct
579 CPUMIPSTLBContext *tlb;
/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-mips/
H A Dcpu.h42 typedef struct CPUMIPSTLBContext CPUMIPSTLBContext;
43 struct CPUMIPSTLBContext {
579 CPUMIPSTLBContext *tlb;
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/mips/
H A Dcpu.h12 typedef struct CPUMIPSTLBContext CPUMIPSTLBContext;
1154 CPUMIPSTLBContext *tlb;
H A Dinternal.h133 struct CPUMIPSTLBContext { struct
/dports/emulators/qemu/qemu-6.2.0/target/mips/
H A Dcpu.h12 typedef struct CPUMIPSTLBContext CPUMIPSTLBContext; typedef
1154 CPUMIPSTLBContext *tlb;
H A Dinternal.h133 struct CPUMIPSTLBContext { struct

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