/dports/devel/avr-gdb/gdb-7.3.1/sim/sh64/ |
H A D | sim-main.h | 26 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val) | (sh64_h_ism_get (cpu)))
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/dports/devel/gdb761/gdb-7.6.1/sim/sh64/ |
H A D | sim-main.h | 26 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val) | (sh64_h_ism_get (cpu)))
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/dports/devel/avr-gdb/gdb-7.3.1/sim/lm32/ |
H A D | sim-main.h | 42 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
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/dports/devel/gdb761/gdb-7.6.1/sim/lm32/ |
H A D | sim-main.h | 42 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
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/dports/devel/avr-gdb/gdb-7.3.1/sim/iq2000/ |
H A D | sim-main.h | 30 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
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/dports/devel/gdb761/gdb-7.6.1/sim/iq2000/ |
H A D | sim-main.h | 30 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/m32r/ |
H A D | sim-main.h | 22 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
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/dports/devel/avr-gdb/gdb-7.3.1/sim/m32r/ |
H A D | sim-main.h | 22 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
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/dports/devel/gdb761/gdb-7.6.1/sim/m32r/ |
H A D | sim-main.h | 22 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/m32r/ |
H A D | sim-main.h | 22 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
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/dports/devel/avr-gdb/gdb-7.3.1/sim/frv/ |
H A D | sim-main.h | 48 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
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H A D | mloop.in | 198 CPU_PC_SET (current_cpu, CGEN_WRITE_QUEUE_ELEMENT_IADDR (item)); 212 CPU_PC_SET (current_cpu, new_pc);
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/dports/devel/gdb761/gdb-7.6.1/sim/frv/ |
H A D | sim-main.h | 47 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
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H A D | mloop.in | 197 CPU_PC_SET (current_cpu, CGEN_WRITE_QUEUE_ELEMENT_IADDR (item)); 211 CPU_PC_SET (current_cpu, new_pc);
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/frv/ |
H A D | sim-main.h | 48 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
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H A D | mloop.in | 198 CPU_PC_SET (current_cpu, CGEN_WRITE_QUEUE_ELEMENT_IADDR (item)); 212 CPU_PC_SET (current_cpu, new_pc);
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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/frv/ |
H A D | sim-main.h | 48 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
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/dports/devel/avr-gdb/gdb-7.3.1/sim/cris/ |
H A D | sim-main.h | 44 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
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/dports/devel/avr-gdb/gdb-7.3.1/sim/common/ |
H A D | sim-cpu.h | 147 #define CPU_PC_SET(cpu,newval) ((* CPU_PC_STORE (cpu)) ((cpu), (newval))) macro
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/dports/devel/gdb761/gdb-7.6.1/sim/common/ |
H A D | sim-cpu.h | 146 #define CPU_PC_SET(cpu,newval) ((* CPU_PC_STORE (cpu)) ((cpu), (newval))) macro
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/dports/devel/gdb761/gdb-7.6.1/sim/cris/ |
H A D | sim-main.h | 43 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
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/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/common/ |
H A D | sim-cpu.h | 147 #define CPU_PC_SET(cpu,newval) ((* CPU_PC_STORE (cpu)) ((cpu), (newval))) macro
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/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/common/ |
H A D | sim-cpu.h | 147 #define CPU_PC_SET(cpu,newval) ((* CPU_PC_STORE (cpu)) ((cpu), (newval))) macro
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/dports/devel/avr-gdb/gdb-7.3.1/sim/bfin/ |
H A D | sim-main.h | 30 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
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/dports/devel/gdb761/gdb-7.6.1/sim/bfin/ |
H A D | sim-main.h | 30 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
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