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Searched refs:CPU_PC_SET (Results 1 – 25 of 34) sorted by relevance

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/dports/devel/avr-gdb/gdb-7.3.1/sim/sh64/
H A Dsim-main.h26 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val) | (sh64_h_ism_get (cpu)))
/dports/devel/gdb761/gdb-7.6.1/sim/sh64/
H A Dsim-main.h26 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val) | (sh64_h_ism_get (cpu)))
/dports/devel/avr-gdb/gdb-7.3.1/sim/lm32/
H A Dsim-main.h42 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
/dports/devel/gdb761/gdb-7.6.1/sim/lm32/
H A Dsim-main.h42 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
/dports/devel/avr-gdb/gdb-7.3.1/sim/iq2000/
H A Dsim-main.h30 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
/dports/devel/gdb761/gdb-7.6.1/sim/iq2000/
H A Dsim-main.h30 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/m32r/
H A Dsim-main.h22 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
/dports/devel/avr-gdb/gdb-7.3.1/sim/m32r/
H A Dsim-main.h22 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
/dports/devel/gdb761/gdb-7.6.1/sim/m32r/
H A Dsim-main.h22 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/m32r/
H A Dsim-main.h22 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
/dports/devel/avr-gdb/gdb-7.3.1/sim/frv/
H A Dsim-main.h48 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
H A Dmloop.in198 CPU_PC_SET (current_cpu, CGEN_WRITE_QUEUE_ELEMENT_IADDR (item));
212 CPU_PC_SET (current_cpu, new_pc);
/dports/devel/gdb761/gdb-7.6.1/sim/frv/
H A Dsim-main.h47 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
H A Dmloop.in197 CPU_PC_SET (current_cpu, CGEN_WRITE_QUEUE_ELEMENT_IADDR (item));
211 CPU_PC_SET (current_cpu, new_pc);
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/frv/
H A Dsim-main.h48 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
H A Dmloop.in198 CPU_PC_SET (current_cpu, CGEN_WRITE_QUEUE_ELEMENT_IADDR (item));
212 CPU_PC_SET (current_cpu, new_pc);
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/frv/
H A Dsim-main.h48 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
/dports/devel/avr-gdb/gdb-7.3.1/sim/cris/
H A Dsim-main.h44 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
/dports/devel/avr-gdb/gdb-7.3.1/sim/common/
H A Dsim-cpu.h147 #define CPU_PC_SET(cpu,newval) ((* CPU_PC_STORE (cpu)) ((cpu), (newval))) macro
/dports/devel/gdb761/gdb-7.6.1/sim/common/
H A Dsim-cpu.h146 #define CPU_PC_SET(cpu,newval) ((* CPU_PC_STORE (cpu)) ((cpu), (newval))) macro
/dports/devel/gdb761/gdb-7.6.1/sim/cris/
H A Dsim-main.h43 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/common/
H A Dsim-cpu.h147 #define CPU_PC_SET(cpu,newval) ((* CPU_PC_STORE (cpu)) ((cpu), (newval))) macro
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/common/
H A Dsim-cpu.h147 #define CPU_PC_SET(cpu,newval) ((* CPU_PC_STORE (cpu)) ((cpu), (newval))) macro
/dports/devel/avr-gdb/gdb-7.3.1/sim/bfin/
H A Dsim-main.h30 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
/dports/devel/gdb761/gdb-7.6.1/sim/bfin/
H A Dsim-main.h30 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))

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