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Searched refs:D16_MASK (Results 1 – 25 of 48) sorted by relevance

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/dports/emulators/simh-hp3000/simh-hp3000-3.11.0.10/SCP/HP3000/
H A Dhp3000_defs.h392 #define D16_MASK 0177777u /* 16-bit data mask */ macro
564 #define SEXT16(x) (int32) ((x) & D16_SIGN ? (x) | ~D16_MASK : (x))
567 #define NEG16(x) ((~(x) + 1) & D16_MASK)
613 #define UPPER_WORD(d) (HP_WORD) ((d) >> D16_WIDTH & D16_MASK)
614 #define LOWER_WORD(d) (HP_WORD) ((d) & D16_MASK)
623 #define HIGH_UPPER_WORD(q) (HP_WORD) ((q) >> D48_WIDTH & D16_MASK)
624 #define LOW_UPPER_WORD(q) (HP_WORD) ((q) >> D32_WIDTH & D16_MASK)
H A Dhp3000_io.h234 #define IORETURN(S,D) ((SIGNALS_DATA) ((S) & ~D16_MASK | (D) & D16_MASK))
235 #define IOSIGNALS(C) ((OUTBOUND_SET) ((C) & ~D16_MASK))
236 #define IODATA(C) ((HP_WORD) ((C) & D16_MASK))
H A Dhp3000_cpu_ims.h128 #define IOCW_COUNT(w) ((w) | ~IOCW_WCNT_MASK & D16_MASK)
H A Dhp_tapelib.h138 #define TLIFN(C) ((CNTLR_IFN_SET) ((C) & ~D16_MASK))
139 #define TLIBUS(C) ((CNTLR_IBUS) ((C) & D16_MASK))
H A Dhp_disclib.h124 #define DLIFN(C) ((CNTLR_IFN_SET) ((C) & ~D16_MASK))
125 #define DLIBUS(C) ((CNTLR_IBUS) ((C) & D16_MASK))
/dports/emulators/simh-hpdoc/simh-hpdoc-3.11.0/SCP/HP3000/
H A Dhp3000_io.h234 #define IORETURN(S,D) ((SIGNALS_DATA) ((S) & ~D16_MASK | (D) & D16_MASK))
235 #define IOSIGNALS(C) ((OUTBOUND_SET) ((C) & ~D16_MASK))
236 #define IODATA(C) ((HP_WORD) ((C) & D16_MASK))
H A Dhp3000_defs.h404 #define D16_MASK 0177777u /* 16-bit data mask */ macro
572 #define SEXT16(x) (int32) ((x) & D16_SIGN ? (x) | ~D16_MASK : (x))
575 #define NEG16(x) ((~(x) + 1) & D16_MASK)
620 #define UPPER_WORD(d) (HP_WORD) ((d) >> D16_WIDTH & D16_MASK)
621 #define LOWER_WORD(d) (HP_WORD) ((d) & D16_MASK)
H A Dhp3000_cpu_ims.h124 #define IOCW_COUNT(w) ((w) | ~IOCW_WCNT_MASK & D16_MASK)
H A Dhp_tapelib.h137 #define TLIFN(C) ((CNTLR_IFN_SET) ((C) & ~D16_MASK))
138 #define TLIBUS(C) ((CNTLR_IBUS) ((C) & D16_MASK))
H A Dhp_disclib.h123 #define DLIFN(C) ((CNTLR_IFN_SET) ((C) & ~D16_MASK))
124 #define DLIBUS(C) ((CNTLR_IBUS) ((C) & D16_MASK))
/dports/emulators/simh-hpdoc/simh-hpdoc-3.11.0/SCP/HP2100/
H A Dhp2100_defs.h463 #define D16_MASK 0177777u /* 16-bit data mask */ macro
499 #define R_MASK D16_MASK /* 16-bit register mask */
648 #define SEXT16(x) ((int32) ((x) & D16_SIGN ? (x) | ~D16_MASK : (x)))
651 #define NEG16(x) ((~(x) + 1) & D16_MASK)
690 #define UPPER_WORD(d) (HP_WORD) ((d) >> D16_WIDTH & D16_MASK)
691 #define LOWER_WORD(d) (HP_WORD) ((d) & D16_MASK)
H A Dhp2100_cpu6.c734 WriteW (pvcn, ReadW (pvcn) + 1 & D16_MASK); /* increment priv nest counter */ in cpu_rte_os()
741 count = ReadW (pvcn) - 1 & D16_MASK; /* decrement priv nest counter */ in cpu_rte_os()
755 eqt = ReadW (AR) + 1 & D16_MASK; /* bump timeout from EQT15 */ in cpu_rte_os()
778 cp = BR << 1 & D16_MASK; /* form char addr (B is direct) */ in cpu_rte_os()
782 cp = cp + 1 & D16_MASK; in cpu_rte_os()
791 cp = key + 12 << 1 & D16_MASK; /* form char addr of name */ in cpu_rte_os()
795 cp = cp + 1 & D16_MASK; /* but copy 6 to get flags */ in cpu_rte_os()
H A Dhp2100_cpu7.c588 cnt = (cnt - 1) & D16_MASK; in cpu_vma_loc()
589 umapr = (umapr + 1) & D16_MASK; in cpu_vma_loc()
590 physpg = (physpg + 1) & D16_MASK; in cpu_vma_loc()
746 pagid = (ptr >> 10) & D16_MASK; /* extract page id (16 bit idx, incl suit*/ in cpu_vma_lbp()
769 suit = (HP_WORD) (pagid + 1 & D16_MASK); /* suit needs increment with wraparound */ in cpu_vma_lbp()
H A Dhp2100_cpu1.c296 v2 = (~v2 + 1) & D16_MASK; /* make divr pos */ in cpu_eau()
707 wc = (wc - 1) & D16_MASK; /* decr cnt */ in cpu_iop()
721 op[1].word = (op[1].word - 1) & D16_MASK; /* decr count */ in cpu_iop()
H A Dhp2100_cpu2.c670 wc = (wc - 1) & D16_MASK; /* decr cnt */ in cpu_eig()
694 wc = (wc - 1) & D16_MASK; /* decr cnt */ in cpu_eig()
770 wc = (wc - 1) & D16_MASK; /* decr cnt */ in cpu_eig()
791 wc = (wc - 1) & D16_MASK; /* decr cnt */ in cpu_eig()
H A Dhp2100_cpu.c4152 exec_mask = D16_MASK; /* and default the mask value */ in set_exec()
4667 data = ReadW (MR) + 1 & D16_MASK; /* then increment the memory word */ in machine_instruction()
4801 data = data ^ D16_MASK; /* then complement the value */ in machine_instruction()
4826 data = data + 1 & D16_MASK; /* then increment the value */ in machine_instruction()
4981 return (value << 1 | value >> 15) & D16_MASK; /* rotate left */ in srg_uop()
4986 return (value >> 1 | value << 15) & D16_MASK; /* rotate right */ in srg_uop()
5015 … return (value << 1 | (HP_WORD) extend) & D16_MASK; /* and rotate left with E filling the LSB */ in srg_uop()
5020 return (value << 4 | value >> 12) & D16_MASK; /* rotate left four */ in srg_uop()
H A Dhp2100_disclib.c1215 (cvptr->verify_count - 1) & D16_MASK; /* modulo 65536 */ in dl_service_drive()
2070 …cvptr->cylinder = cvptr->cylinder - 1 & D16_MASK; /* decrease the cylinder address with wraparou… in position_sector()
2072 …cvptr->cylinder = cvptr->cylinder + 1 & D16_MASK; /* increase the cylinder address with wraparou… in position_sector()
/dports/emulators/simh-hp2100/simh-hp2100-3.11.0.31/SCP/HP2100/
H A Dhp2100_defs.h486 #define D16_MASK 0177777u /* 16-bit data mask */ macro
522 #define R_MASK D16_MASK /* 16-bit register mask */
671 #define SEXT16(x) ((int32) ((x) & D16_SIGN ? (x) | ~D16_MASK : (x)))
674 #define NEG16(x) ((~(x) + 1) & D16_MASK)
713 #define UPPER_WORD(d) (HP_WORD) ((d) >> D16_WIDTH & D16_MASK)
714 #define LOWER_WORD(d) (HP_WORD) ((d) & D16_MASK)
H A Dhp2100_cpu6.c735 WriteW (pvcn, ReadW (pvcn) + 1 & D16_MASK); /* increment priv nest counter */ in cpu_rte_os()
742 count = ReadW (pvcn) - 1 & D16_MASK; /* decrement priv nest counter */ in cpu_rte_os()
756 eqt = ReadW (AR) + 1 & D16_MASK; /* bump timeout from EQT15 */ in cpu_rte_os()
779 cp = BR << 1 & D16_MASK; /* form char addr (B is direct) */ in cpu_rte_os()
783 cp = cp + 1 & D16_MASK; in cpu_rte_os()
792 cp = key + 12 << 1 & D16_MASK; /* form char addr of name */ in cpu_rte_os()
796 cp = cp + 1 & D16_MASK; /* but copy 6 to get flags */ in cpu_rte_os()
H A Dhp2100_cpu7.c588 cnt = (cnt - 1) & D16_MASK; in cpu_vma_loc()
589 umapr = (umapr + 1) & D16_MASK; in cpu_vma_loc()
590 physpg = (physpg + 1) & D16_MASK; in cpu_vma_loc()
746 pagid = (ptr >> 10) & D16_MASK; /* extract page id (16 bit idx, incl suit*/ in cpu_vma_lbp()
769 suit = (HP_WORD) (pagid + 1 & D16_MASK); /* suit needs increment with wraparound */ in cpu_vma_lbp()
H A Dhp2100_cpu1.c296 v2 = (~v2 + 1) & D16_MASK; /* make divr pos */ in cpu_eau()
707 wc = (wc - 1) & D16_MASK; /* decr cnt */ in cpu_iop()
721 op[1].word = (op[1].word - 1) & D16_MASK; /* decr count */ in cpu_iop()
H A Dhp2100_cpu2.c670 wc = (wc - 1) & D16_MASK; /* decr cnt */ in cpu_eig()
694 wc = (wc - 1) & D16_MASK; /* decr cnt */ in cpu_eig()
770 wc = (wc - 1) & D16_MASK; /* decr cnt */ in cpu_eig()
791 wc = (wc - 1) & D16_MASK; /* decr cnt */ in cpu_eig()
H A Dhp2100_cpu.c4464 exec_mask = D16_MASK; /* and default the mask value */ in set_exec()
4998 data = ReadW (MR) + 1 & D16_MASK; /* then increment the memory word */ in machine_instruction()
5132 data = data ^ D16_MASK; /* then complement the value */ in machine_instruction()
5157 data = data + 1 & D16_MASK; /* then increment the value */ in machine_instruction()
5312 return (value << 1 | value >> 15) & D16_MASK; /* rotate left */ in srg_uop()
5317 return (value >> 1 | value << 15) & D16_MASK; /* rotate right */ in srg_uop()
5346 … return (value << 1 | (HP_WORD) extend) & D16_MASK; /* and rotate left with E filling the LSB */ in srg_uop()
5351 return (value << 4 | value >> 12) & D16_MASK; /* rotate left four */ in srg_uop()
H A Dhp2100_disclib.c1217 (cvptr->verify_count - 1) & D16_MASK; /* modulo 65536 */ in dl_service_drive()
2072 …cvptr->cylinder = cvptr->cylinder - 1 & D16_MASK; /* decrease the cylinder address with wraparou… in position_sector()
2074 …cvptr->cylinder = cvptr->cylinder + 1 & D16_MASK; /* increase the cylinder address with wraparou… in position_sector()
H A Dhp2100_cpu_fpp.c492 packed.word = (HP_WORD) (unpacked >> 48) & D16_MASK; /* pack single integer */ in pack_int()
502 packed.fpk[i] = (HP_WORD) unpacked & D16_MASK; in pack_int()

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