1 /* hp2100_defs.h: HP 2100 simulator architectural declarations 2 3 Copyright (c) 1993-2016, Robert M. Supnik 4 Copyright (c) 2017-2019, J. David Bryan 5 6 Permission is hereby granted, free of charge, to any person obtaining a copy 7 of this software and associated documentation files (the "Software"), to deal 8 in the Software without restriction, including without limitation the rights 9 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 copies of the Software, and to permit persons to whom the Software is 11 furnished to do so, subject to the following conditions: 12 13 The above copyright notice and this permission notice shall be included in 14 all copies or substantial portions of the Software. 15 16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 20 ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 21 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 22 23 Except as contained in this notice, the names of the authors shall not be 24 used in advertising or otherwise to promote the sale, use or other dealings 25 in this Software without prior written authorization from the authors. 26 27 08-Dec-19 JDB Added "hp_reset_poll" routine declaration 28 28-Mar-19 JDB Added extensions 29 18-Mar-19 JDB Added include for SCP extensions 30 20-Sep-18 JDB Moved "hp_device_conflict" code into "initialize_io" in cpu.c 31 25-Jul-18 JDB Added CPU configuration declarations 32 29-Jun-18 JDB Changed "sync_poll" to "hp_sync_poll" 33 14-Jun-18 JDB Renamed PRO to MPPE 34 05-Jun-18 JDB Revised I/O model 35 02-May-18 JDB Added "SIRDEV" for first device to receive the SIR signal 36 16-Oct-17 JDB Suppressed logical-not-parentheses warning on clang 37 30-Aug-17 JDB Replaced POLL_WAIT with POLL_PERIOD 38 07-Aug-17 JDB Added "hp_attach" 39 20-Jul-17 JDB Removed STOP_OFFLINE, STOP_PWROFF stop codes 40 11-Jul-17 JDB Moved "ibl_copy" to hp2100_cpu.h 41 26-Jun-17 JDB Moved I/O instruction subopcode constants to hp2100_cpu.c 42 14-Jun-17 JDB Renamed STOP_RSRV to STOP_UNIMPL (unimplemented instruction) 43 15-Mar-17 JDB Added global trace flags 44 27-Feb-17 JDB ibl_copy no longer returns a status code 45 15-Feb-17 JDB Deleted unneeded guard macro definition 46 16-Jan-17 JDB Added tracing and console output macros 47 13-Jan-17 JDB Added fprint_cpu 48 10-Jan-17 JDB Added architectural constants 49 05-Aug-16 JDB Removed PC_Global renaming; P register is now "PR" 50 13-May-16 JDB Modified for revised SCP API function parameter types 51 19-Jun-15 JDB Conditionally use PC_Global for PC for version 4.0 and on 52 30-Dec-14 JDB Added S-register parameters to ibl_copy, more IBL constants 53 28-Dec-14 JDB Changed suppression from #pragma GCC to #pragma clang 54 05-Feb-13 JDB Added declaration for hp_fprint_stopped 55 18-Mar-13 JDB Added "-Wdangling-else" to the suppression pragmas 56 Removed redundant extern declarations 57 14-Mar-13 MP Changed guard macro name to avoid reserved namespace 58 14-Dec-12 JDB Added "-Wbitwise-op-parentheses" to the suppression pragmas 59 12-May-12 JDB Added pragmas to suppress logical operator precedence warnings 60 10-Feb-12 JDB Added hp_setsc, hp_showsc functions to support SC modifier 61 28-Mar-11 JDB Tidied up signal handling 62 29-Oct-10 JDB DMA channels renamed from 0,1 to 1,2 to match documentation 63 27-Oct-10 JDB Revised I/O signal enum values for concurrent signals 64 Revised I/O macros for new signal handling 65 09-Oct-10 JDB Added DA and DC device select code assignments 66 07-Sep-08 JDB Added POLL_FIRST to indicate immediate connection attempt 67 15-Jul-08 JDB Rearranged declarations with hp2100_cpu.h 68 26-Jun-08 JDB Rewrote device I/O to model backplane signals 69 25-Jun-08 JDB Added PIF device 70 17-Jun-08 JDB Declared fmt_char() function 71 26-May-08 JDB Added MPX device 72 24-Apr-08 JDB Added I_MRG_I, I_JSB, I_JSB_I, and I_JMP instruction masks 73 14-Apr-08 JDB Changed TMR_MUX to TMR_POLL for idle support 74 Added POLLMODE, sync_poll() declaration 75 Added I_MRG, I_ISZ, I_IOG, I_STF, and I_SFS instruction masks 76 07-Dec-07 JDB Added BACI device 77 10-Nov-07 JDB Added 16/32-bit unsigned-to-signed conversions 78 11-Jan-07 JDB Added 12578A DMA byte packing to DMA structure 79 28-Dec-06 JDB Added CRS backplane signal as I/O pseudo-opcode 80 Added DMASK32 32-bit mask value 81 21-Dec-06 JDB Changed MEM_ADDR_OK for 21xx loader support 82 12-Sep-06 JDB Define NOTE_IOG to recalc interrupts after instr exec 83 Rename STOP_INDINT to NOTE_INDINT (not a stop condition) 84 30-Dec-04 JDB Added IBL_DS_HEAD head number mask 85 19-Nov-04 JDB Added STOP_OFFLINE, STOP_PWROFF stop codes 86 25-Apr-04 RMS Added additional IBL definitions 87 Added DMA EDT I/O pseudo-opcode 88 25-Apr-03 RMS Revised for extended file support 89 24-Oct-02 RMS Added indirect address interrupt 90 08-Feb-02 RMS Added DMS definitions 91 01-Feb-02 RMS Added terminal multiplexor support 92 16-Jan-02 RMS Added additional device support 93 30-Nov-01 RMS Added extended SET/SHOW support 94 15-Oct-00 RMS Added dynamic device numbers 95 14-Apr-99 RMS Changed t_addr to unsigned 96 97 The [original] author gratefully acknowledges the help of Jeff Moffat in 98 answering questions about the HP2100, and of Dave Bryan in adding features 99 and correcting errors throughout the simulator. 100 101 102 This file provides the general declarations used throughout the HP 2100 103 simulator. It is required by all modules. 104 105 106 ----------------------------------------------------- 107 Implementation Note -- Compiling the Simulator as C++ 108 ----------------------------------------------------- 109 110 This simulator is written in ISO-standard C, specifically to the ISO/IEC 111 9899:1999 standard. While it might be desirable to compile the simulator 112 with a C++ compiler to obtain more careful type checking, the simulator would 113 have to be be written in the subset of C that is also valid C++. Using valid 114 C features beyond that subset, as the HP 3000 simulator does, will produce 115 C++ compiler errors. 116 117 The standard C features used by the simulator that prevent error-free C++ 118 compilation are: 119 120 1. Incomplete types. 121 122 In C, mutually recursive type definitions are allowed by the use of 123 incomplete type declarations, such as "DEVICE ms_dev;" followed later by 124 "DEVICE ms_dev {...};". Several HP device simulators use this feature to 125 place a pointer to the device structure in the "desc" field of an MTAB 126 array element, typically when the associated validation or display 127 routine handles multiple devices. As the DEVICE contains a pointer to 128 the MTAB array, and an MTAB array element contains a pointer to the 129 DEVICE, the definitions are mutually recursive, and incomplete types are 130 employed. C++ does not permit incomplete types. 131 132 2. Implicit conversion of ints to enums. 133 134 In C, enumeration types are compatible with integer types, and its 135 members are constants having type "int". As such, they are semantically 136 equivalent to and may be used interchangeably with integers. For the 137 developer, though, C enumerations have some advantages. In particular, 138 the compiler may check a "switch" statement to ensure that all of the 139 enumeration cases are covered. Also, a mathematical set may be modeled 140 by an enumeration type with disjoint enumerator values, with the bitwise 141 integer OR and AND operators modeling the set union and intersection 142 operations. The latter has direct support in the "gdb" debugger, which 143 will display an enumerated type value as a union of the various 144 enumerators. The HP simulator makes extensive use of both features to 145 model hardware signal buses (e.g., INBOUND_SET, OUTBOUND_SET) and so 146 performs bitwise integer operations on the enumerations to model signal 147 assertion and denial. In C++, implicit conversion from enumerations to 148 integers is allowed, but conversion from integers to enumerations is 149 illegal without explicit casts. Therefore, the idiom employed by the 150 simulator to assert a signal (e.g., "outbound_signals |= ioIRQ") is 151 rejected by the C++ compiler. 152 153 3. Implicit increment operations on enums. 154 155 Because enums are compatible with integers in C, no special enumerator 156 increment operator is provided. To cycle through the range of an 157 enumeration type, e.g. in a "for" statement, the standard integer 158 increment operator, "++", is used. In C++, the "++" operator must be 159 overloaded with a version specific to the enumeration type; applying the 160 integer "++" to an enumeration is illegal. 161 162 4. Use of C++ keywords as variable names. 163 164 C++ reserves a number of additional keywords beyond those reserved by C. 165 Use of any of these keywords as a variable or type name is legal C but 166 illegal C++. The HP simulator uses variables named "class" and 167 "operator", which are keywords in C++. 168 169 The HP simulator will compile cleanly with a compiler implementing the 1999 C 170 standard. Compilation as C++ is not a goal of the simulator and cannot work, 171 given the incompatibilities listed above. 172 */ 173 174 175 176 #include "sim_rev.h" 177 #include "sim_defs.h" 178 #include "sim_extension.h" 179 180 181 182 /* The following pragmas quell clang and Microsoft Visual C++ warnings that are 183 on by default but should not be, in my opinion. They warn about the use of 184 perfectly valid code and require the addition of redundant parentheses and 185 braces to silence them. Rather than clutter up the code with scores of extra 186 symbols that, in my view, make the code harder to read and maintain, I elect 187 to suppress these warnings. 188 189 VC++ 2008 warning descriptions: 190 191 - 4114: "same type qualifier used more than once" [legal per C99] 192 193 - 4554: "check operator precedence for possible error; use parentheses to 194 clarify precedence" 195 196 - 4996: "function was declared deprecated" 197 */ 198 199 #if defined (__clang__) 200 201 #pragma clang diagnostic ignored "-Wlogical-not-parentheses" 202 #pragma clang diagnostic ignored "-Wlogical-op-parentheses" 203 #pragma clang diagnostic ignored "-Wbitwise-op-parentheses" 204 #pragma clang diagnostic ignored "-Wshift-op-parentheses" 205 #pragma clang diagnostic ignored "-Wdangling-else" 206 207 #elif defined (_MSC_VER) 208 209 #pragma warning (disable: 4114 4554 4996) 210 211 #endif 212 213 214 215 /* Device register display mode flags */ 216 217 #define REG_X REG_VMIO /* permit symbolic display overrides */ 218 219 #define REG_A (1u << REG_V_UF + 0) /* default format is -A (one ASCII character) */ 220 #define REG_C (1u << REG_V_UF + 1) /* default format is -C (two ASCII characters) */ 221 #define REG_M (1u << REG_V_UF + 2) /* default format is -M (mnemonic) */ 222 223 224 /* Global tracing flags. 225 226 Global tracing flags are allocated in ascending order, as they may be used 227 by modules that allocate their own private flags in descending order. No 228 check is made for overlapping values. 229 */ 230 231 #define TRACE_CMD (1u << 0) /* trace interface or controller commands */ 232 #define TRACE_INCO (1u << 1) /* trace interface or controller command initiations and completions */ 233 #define TRACE_CSRW (1u << 2) /* trace interface control, status, read, and write actions */ 234 #define TRACE_STATE (1u << 3) /* trace state changes */ 235 #define TRACE_SERV (1u << 4) /* trace unit service scheduling calls and entries */ 236 #define TRACE_PSERV (1u << 5) /* trace periodic unit service scheduling calls and entries */ 237 #define TRACE_XFER (1u << 6) /* trace data receptions and transmissions */ 238 #define TRACE_IOBUS (1u << 7) /* trace I/O bus signals and data words received and returned */ 239 240 #define DEB_CMDS (1u << 8) /* (old) trace command initiations and completions */ 241 #define DEB_CPU (1u << 9) /* (old) trace words received from and sent to the CPU */ 242 #define DEB_BUF (1u << 10) /* (old) trace data read from and written to the FIFO */ 243 #define DEB_XFER (1u << 11) /* (old) trace data receptions and transmissions */ 244 #define DEB_RWS (1u << 12) /* (old) trace tape reads, writes, and status returns */ 245 #define DEB_RWSC (1u << 13) /* (old) trace disc read/write/status/control commands */ 246 #define DEB_SERV (1u << 14) /* (old) trace unit service scheduling calls and entries */ 247 248 249 /* Tracing and console output. 250 251 "tprintf" is used to write tracing messages. It does an "fprintf" to the 252 debug output stream if the stream is open and the trace "flag" is currently 253 enabled in device "dev". Otherwise, it's a NOP. "..." is the format string 254 and associated values. 255 256 "tpprintf" is identical to "tprintf", except that a device pointer is passed 257 instead of a device structure. 258 259 "TRACING" and "TRACINGP" implement the test conditions for device and device 260 pointer tracing, respectively. They are used explicitly only when several 261 trace statements employing the same flag are required, and it is desirable to 262 avoid repeating the stream and flag test for each one. 263 264 "cprintf", "cputs", and "cputc" are used to write messages to the console 265 and, if console logging is enabled, to the log output stream. They do 266 "(f)printf", "fputs", or "(f)putc", respectively. "..." is the format string 267 and associated values, "str" is the string to write, and "ch" is the 268 character to write. 269 270 271 Implementation notes: 272 273 1. The "cputs" macro uses "fputs" for both console and log file output 274 because "puts" appends a newline, whereas "fputs" does not. 275 */ 276 277 #define TRACING(d,f) (sim_deb != NULL && ((d).dctrl & (f))) 278 279 #define TRACINGP(d,f) (sim_deb != NULL && ((d)->dctrl & (f))) 280 281 #define tprintf(dev, flag, ...) \ 282 if (TRACING (dev, flag)) \ 283 hp_trace (&(dev), (flag), __VA_ARGS__); \ 284 else \ 285 (void) 0 286 287 #define tpprintf(dptr, flag, ...) \ 288 if (TRACINGP (dptr, flag)) \ 289 hp_trace ((dptr), (flag), __VA_ARGS__); \ 290 else \ 291 (void) 0 292 293 #define cprintf(...) \ 294 do { \ 295 printf (__VA_ARGS__); \ 296 if (sim_log) \ 297 fprintf (sim_log, __VA_ARGS__); \ 298 } \ 299 while (0) 300 301 #define cputs(str) \ 302 do { \ 303 fputs (str, stdout); \ 304 if (sim_log) \ 305 fputs (str, sim_log); \ 306 } \ 307 while (0) 308 309 #define cputc(ch) \ 310 do { \ 311 putc (ch); \ 312 if (sim_log) \ 313 fputc (ch, sim_log); \ 314 } \ 315 while (0) 316 317 318 /* Simulation stop and notification codes. 319 320 The STOP_* status codes stop the simulator. The "sim_stop_messages" array in 321 "hp2100_sys.c" contains the message strings that correspond one-for-one with 322 the stop codes. 323 324 The NOTE_* status codes do not stop the simulator. Instead, they inform the 325 instruction execution loop of special situations that occurred while 326 processing the current machine instruction.. 327 328 329 Implementation notes: 330 331 1. Codes before STOP_RERUN cause the instruction to be rerun, so P is backed 332 up twice. For codes after, P points to the next instruction to be 333 executed (which is the current instruction for an infinite loop stop). 334 */ 335 336 #define STOP_UNIMPL 1 /* unimplemented instruction stop */ 337 #define STOP_UNSC 2 /* stop on I/O to an unassigned select code */ 338 #define STOP_UNDEF 3 /* undefined instruction stop */ 339 #define STOP_INDIR 4 /* stop on an indirect loop */ 340 341 #define STOP_RERUN 4 /* stops above here cause the instruction to be re-run */ 342 343 #define STOP_HALT 5 /* programmed halt */ 344 #define STOP_BRKPNT 6 /* breakpoint */ 345 #define STOP_NOCONN 7 /* no connection */ 346 #define STOP_NOTAPE 8 /* no tape */ 347 #define STOP_EOT 9 /* end of tape */ 348 349 #define NOTE_INDINT 10 /* an interrupt occurred while resolving an indirect address */ 350 351 352 /* Modifier validation identifiers */ 353 354 #define MTAB_XDV (MTAB_XTD | MTAB_VDV) 355 #define MTAB_XUN (MTAB_XTD | MTAB_VUN) 356 357 358 /* I/O event timing. 359 360 I/O events are scheduled for future service by specifying the desired delay 361 in units of event ticks. Typically, one event tick represents the execution 362 of one CPU instruction, and this is the way event ticks are defined in the 363 current simulator implementation. However, the various CPUs themselves not 364 only vary in speed, but the actual instruction times vary greatly, due to the 365 presence of block move, compare, and scan instructions. Variations of an 366 order of magnitude are common, and two orders or more are possible for longer 367 blocks. 368 369 The 24296-90001 Diagnostic Configurator provides a one millisecond timer for 370 use by the diagnostic programs. The timer is a two-instruction software 371 loop, plus four instructions of entry/exit overhead, based on the processor 372 type. The values provided are: 373 374 Loop Instr 375 CPU Count /msec 376 ------ ----- ----- 377 2114 246 496 378 2115 246 496 379 2116 309 622 380 2100 252 508 381 1000-M 203 410 382 1000-E 1573 * 1577 383 384 * The E-Series TIMER instruction is used instead of a software loop. TIMER 385 re-executes an internal decrement until the supplied value reaches zero. 386 387 To pass diagnostics that time peripheral operations, the simulator assumes 388 the E-Series execution rate for all devices (0.634 microseconds per event 389 tick), although this results in needlessly long delays for normal operation. 390 A correct implementation would change the timing base depending on the 391 currently selected CPU. 392 393 To accommodate possible future variable instruction timing, I/O service 394 activation times must not assume a constant 0.634 microseconds per event 395 tick. Delays should be defined in terms of the "uS" (microseconds), "mS" 396 (milliseconds), and "S" (seconds) macros below. 397 */ 398 399 #define USEC_PER_EVENT 0.634 /* average CPU instruction time in microseconds */ 400 401 #define uS(t) (uint32) ((t) > USEC_PER_EVENT ? (t) / USEC_PER_EVENT + 0.5 : 1) 402 #define mS(t) (uint32) (((t) * 1000.0) / USEC_PER_EVENT + 0.5) 403 #define S(t) (uint32) (((t) * 1000000.0) / USEC_PER_EVENT + 0.5) 404 405 406 /* Architectural data constants. 407 408 These macros specify the width, sign location, value mask, and minimum and 409 maximum signed and unsigned values for the data sizes supported by the 410 simulator. In addition, masks for 16-bit and 32-bit overflow are defined (an 411 overflow is indicated if the masked bits are not all ones or all zeros). 412 413 The HP_WORD type is used to declare variables that represent 16-bit registers 414 or buses in hardware. 415 416 417 Implementation notes: 418 419 1. The HP_WORD type is a 32-bit unsigned type, instead of the more logical 420 16-bit unsigned type. There are two reasons for this. First, SCP 421 requires that scalars referenced by REG (register) entries be 32 bits in 422 size. Second, IA-32 processors execute instructions with 32-bit operands 423 much faster than those with 16-bit operands. 424 425 Using 16-bit operands omits the masking required for 32-bit values. For 426 example, the code generated by gcc for the following operations is as 427 follows: 428 429 uint16 a, b, c; 430 a = b + c & 0xFFFF; 431 432 movzwl _b, %eax 433 addw _c, %ax 434 movw %ax, _a 435 436 uint32 x, y, z; 437 x = y + z & 0xFFFF; 438 439 movl _z, %eax 440 addl _y, %eax 441 andl $65535, %eax 442 movl %eax, _x 443 444 However, the first case uses operand override prefixes, which require 445 substantially more time to decode (6 clock cycles vs. 1 clock cycle). 446 This time outweighs the additional 32-bit AND instruction, which executes 447 in 1 clock cycle. 448 */ 449 450 typedef uint32 HP_WORD; /* HP 16-bit data word representation */ 451 452 #define D4_WIDTH 4 /* 4-bit data bit width */ 453 #define D4_MASK 0017u /* 4-bit data mask */ 454 455 #define D8_WIDTH 8 /* 8-bit data bit width */ 456 #define D8_MASK 0377u /* 8-bit data mask */ 457 #define D8_UMAX 0377u /* 8-bit unsigned maximum value */ 458 #define D8_SMAX 0177u /* 8-bit signed maximum value */ 459 #define D8_SMIN 0200u /* 8-bit signed minimum value */ 460 #define D8_SIGN 0200u /* 8-bit sign */ 461 462 #define D16_WIDTH 16 /* 16-bit data bit width */ 463 #define D16_MASK 0177777u /* 16-bit data mask */ 464 #define D16_UMAX 0177777u /* 16-bit unsigned maximum value */ 465 #define D16_SMAX 0077777u /* 16-bit signed maximum value */ 466 #define D16_SMIN 0100000u /* 16-bit signed minimum value */ 467 #define D16_SIGN 0100000u /* 16-bit sign */ 468 469 #define D32_WIDTH 32 /* 32-bit data bit width */ 470 #define D32_MASK 037777777777u /* 32-bit data mask */ 471 #define D32_UMAX 037777777777u /* 32-bit unsigned maximum value */ 472 #define D32_SMAX 017777777777u /* 32-bit signed maximum value */ 473 #define D32_SMIN 020000000000u /* 32-bit signed minimum value */ 474 #define D32_SIGN 020000000000u /* 32-bit sign */ 475 476 #define D48_WIDTH 48 /* 48-bit data bit width */ 477 #define D48_MASK 07777777777777777uL /* 48-bit data mask */ 478 #define D48_UMAX 07777777777777777uL /* 48-bit unsigned maximum value */ 479 #define D48_SMAX 03777777777777777uL /* 48-bit signed maximum value */ 480 #define D48_SMIN 04000000000000000uL /* 48-bit signed minimum value */ 481 #define D48_SIGN 04000000000000000uL /* 48-bit sign */ 482 483 #define D64_WIDTH 64 /* 64-bit data bit width */ 484 #define D64_MASK 01777777777777777777777uL /* 64-bit data mask */ 485 #define D64_UMAX 01777777777777777777777uL /* 64-bit unsigned maximum value */ 486 #define D64_SMAX 00777777777777777777777uL /* 64-bit signed maximum value */ 487 #define D64_SMIN 01000000000000000000000uL /* 64-bit signed minimum value */ 488 #define D64_SIGN 01000000000000000000000uL /* 64-bit sign */ 489 490 #define S16_OVFL_MASK ((uint32) D16_UMAX << D16_WIDTH | \ 491 D16_SIGN) /* 16-bit signed overflow mask */ 492 493 #define S32_OVFL_MASK ((t_uint64) D32_UMAX << D32_WIDTH | \ 494 D32_SIGN) /* 32-bit signed overflow mask */ 495 496 #define LSB 1u /* least-significant bit */ 497 #define D16_SIGN_LSB (D16_SIGN | LSB) /* bit 15 and bit 0 */ 498 499 #define R_MASK D16_MASK /* 16-bit register mask */ 500 501 502 /* Architectural memory constants. 503 504 These macros specify the width, data mask, and maximum unsigned values for 505 the implementation of logical and physical addresses. 506 507 HP 21xx and 1000 CPUs address a maximum of 32K words with 15-bit addresses. 508 This is the logical address space. A logical address contains a 5-bit page 509 number, designating one of 32 1K-word pages, and a 10-bit offset into that 510 page. 1000-series machines may employ an optional Memory Expansion Module to 511 map the logical address space anywhere with a 1M-word physical memory on a 512 per-page basis. The MEM translates a logical address to a physical address 513 by mapping the 5-bit logical page number to a 10-bit physical page number 514 while retaining the logical page offset. Physical addresses therefore 515 support 1024 pages of 1024 words each. 516 517 The logical address form is: 518 519 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 520 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ 521 | - | page number | page offset | 522 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ 523 524 ...where bit 15 is not used (it is reserved for an indirect address 525 indicator). 526 527 The physical address form is: 528 529 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 530 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ 531 | page number | page offset | 532 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ 533 534 The MEMORY_WORD type is used to declare variables that represent 16-bit main 535 memory locations in hardware. 536 537 538 Implementation notes: 539 540 1. The MEMORY_WORD type is a 16-bit unsigned type, corresponding with the 541 16-bit main memory in the HP 21xx/1000. Unlike the general data type, 542 which is a 32-bit type for speed, main memory does not benefit from the 543 faster 32-bit execution on IA-32 processors, as only one instruction in 544 the "mem_read" and "mem_write" routines has an operand override that 545 invokes the slower instruction fetch path. There is a negligible 546 difference in the Memory Pattern Test diagnostic execution speeds for the 547 uint32 vs. uint16 definition, whereas the VM requirements are doubled for 548 the former. 549 */ 550 551 typedef uint16 MEMORY_WORD; /* HP 16-bit memory word representation */ 552 553 #define OF_WIDTH 10 /* offset bit width */ 554 #define OF_MASK ((1u << OF_WIDTH) - 1) /* offset mask (2 ** 10 - 1) */ 555 #define OF_MAX ((1u << OF_WIDTH) - 1) /* offset maximum (2 ** 10 - 1) */ 556 557 #define LP_WIDTH 5 /* logical page bit width */ 558 #define LP_MASK ((1u << LP_WIDTH) - 1) /* logical page mask (2 ** 5 - 1) */ 559 #define LP_MAX ((1u << LP_WIDTH) - 1) /* logical page maximum (2 ** 5 - 1) */ 560 561 #define PP_WIDTH 10 /* physical page bit width */ 562 #define PP_MASK ((1u << PP_WIDTH) - 1) /* physical page mask (2 ** 10 - 1) */ 563 #define PP_MAX ((1u << PP_WIDTH) - 1) /* physical page maximum (2 ** 10 - 1) */ 564 565 #define LA_WIDTH (LP_WIDTH + OF_WIDTH) /* logical address bit width */ 566 #define LA_MASK ((1u << LA_WIDTH) - 1) /* logical address mask (2 ** 15 - 1) */ 567 #define LA_MAX ((1u << LA_WIDTH) - 1) /* logical address maximum (2 ** 15 - 1) */ 568 569 #define PA_WIDTH (PP_WIDTH + OF_WIDTH) /* physical address bit width */ 570 #define PA_MASK ((1u << PA_WIDTH) - 1) /* physical address mask (2 ** 20 - 1) */ 571 #define PA_MAX ((1u << PA_WIDTH) - 1) /* physical address maximum (2 ** 20 - 1) */ 572 573 #define DV_WIDTH 16 /* data value bit width */ 574 #define DV_MASK ((1u << DV_WIDTH) - 1) /* data value mask (2 ** 16 - 1) */ 575 #define DV_SIGN ( 1u << (DV_WIDTH - 1)) /* data value sign (2 ** 15) */ 576 #define DV_UMAX ((1u << DV_WIDTH) - 1) /* data value unsigned maximum (2 ** 16 - 1) */ 577 #define DV_SMAX ((1u << (DV_WIDTH - 1)) - 1) /* data value signed maximum (2 ** 15 - 1) */ 578 579 580 /* Memory address macros. 581 582 These macros convert between logical and physical addresses. The functions 583 provided are: 584 585 - P_PAGE -- extract the page number part of a physical address 586 - PAGE -- extract the page number part of a logical address 587 - OFFSET -- extract the offset part of a logical or physical address 588 - TO_PA -- merge a page number and offset into a physical address 589 */ 590 591 #define P_PAGE(p) ((p) >> OF_WIDTH & PP_MASK) 592 #define PAGE(p) ((p) >> OF_WIDTH & LP_MASK) 593 #define OFFSET(p) ((p) & OF_MASK) 594 #define TO_PA(p,o) (((uint32) (p) & PP_MASK) << PP_WIDTH | (uint32) (o) & OF_MASK) 595 596 597 /* Memory access classifications. 598 599 The access classification determines the DMS map set and protections to use 600 when reading or writing memory words. The classification also is used to 601 label each data access when tracing is enabled. When DMS is disabled, or 602 when the CPU is one of the 21xx models, the classification is irrelevant. 603 */ 604 605 typedef enum { 606 Fetch, /* instruction fetch, current map */ 607 Data, /* data access, current map */ 608 Data_Alternate, /* data access, alternate map */ 609 Data_System, /* data access, system map */ 610 Data_User, /* data access, user map */ 611 DMA_Channel_1, /* DMA channel 1, port A map */ 612 DMA_Channel_2 /* DMA channel 2, port B map */ 613 } ACCESS_CLASS; 614 615 616 /* Portable conversions. 617 618 SIMH is written with the assumption that the defined-size types (e.g., 619 uint16) are at least the required number of bits but may be larger. 620 Conversions that otherwise would make inherent size assumptions must instead 621 be coded explicitly. For example, doing: 622 623 negative_value_32 = (int32) negative_value_16; 624 625 ...will not guarantee that the upper 16 bits of "negative_value_32" are all 626 ones, whereas the supplied sign-extension macro will. 627 628 The conversions available are: 629 630 - SEXT8 -- signed 8-bit value sign-extended to int32 631 - SEXT16 -- signed 16-bit value sign-extended to int32 632 633 - NEG8 -- signed 8-bit value negated 634 - NEG16 -- signed 16-bit value negated 635 - NEG32 -- signed 32-bit value negated 636 637 - INT16 -- uint16 to int16 638 - INT32 -- uint32 to int32 639 640 641 Implementation notes: 642 643 1. The SEXTn and INTn routines assume that their values are masked to 644 exactly n bits before invoking. 645 */ 646 647 #define SEXT8(x) ((int32) ((x) & D8_SIGN ? (x) | ~D8_MASK : (x))) 648 #define SEXT16(x) ((int32) ((x) & D16_SIGN ? (x) | ~D16_MASK : (x))) 649 650 #define NEG8(x) ((~(x) + 1) & D8_MASK) 651 #define NEG16(x) ((~(x) + 1) & D16_MASK) 652 #define NEG32(x) ((~(x) + 1) & D32_MASK) 653 654 #define INT16(u) ((u) > D16_SMAX ? (-(int16) (D16_UMAX - (u)) - 1) : (int16) (u)) 655 #define INT32(u) ((u) > D32_SMAX ? (-(int32) (D32_UMAX - (u)) - 1) : (int32) (u)) 656 657 658 /* Byte accessors. 659 660 These macros extract the upper and lower bytes from a word and form a word 661 from upper and lower bytes. Replacement of a byte within a word is also 662 provided, as is an enumeration type that defines byte selection. 663 664 The accessors are: 665 666 - UPPER_BYTE -- return the byte from the upper position of a word value 667 - LOWER_BYTE -- return the byte from the lower position of a word value 668 - TO_WORD -- return a word with the specified upper and lower bytes 669 670 - REPLACE_UPPER -- replace the upper byte of the word value 671 - REPLACE_LOWER -- replace the lower byte of the word value 672 673 */ 674 675 typedef enum { 676 upper, /* upper byte selected */ 677 lower /* lower byte selected */ 678 } BYTE_SELECTOR; 679 680 #define UPPER_BYTE(w) (uint8) ((w) >> D8_WIDTH & D8_MASK) 681 #define LOWER_BYTE(w) (uint8) ((w) & D8_MASK) 682 #define TO_WORD(u,l) (HP_WORD) (((u) & D8_MASK) << D8_WIDTH | (l) & D8_MASK) 683 684 #define REPLACE_UPPER(w,b) ((w) & D8_MASK | ((b) & D8_MASK) << D8_WIDTH) 685 #define REPLACE_LOWER(w,b) ((w) & D8_MASK << D8_WIDTH | (b) & D8_MASK) 686 687 688 /* Double-word accessors */ 689 690 #define UPPER_WORD(d) (HP_WORD) ((d) >> D16_WIDTH & D16_MASK) 691 #define LOWER_WORD(d) (HP_WORD) ((d) & D16_MASK) 692 693 #define TO_DWORD(u,l) ((uint32) (u) << D16_WIDTH | (l)) 694 695 696 /* CPU instruction symbolic source. 697 698 The memory-reference group (MRG) instructions do not specify full logical 699 addresses of their targets. Instead, they specify offsets from either the 700 base page or the current page. Instructions specifying base-page offsets are 701 always displayed with target addresses between 0000-1777. The display and 702 parsing of instructions specifying current-page offsets depends on the source 703 of the instructions. 704 705 If the current-page CPU instruction is contained in main memory, the current 706 page is taken from the address of the word containing the instruction, and 707 the full target address between 00000-77777 is displayed or parsed. However, 708 if the instruction is contained in a device buffer, e.g., a disc drive sector 709 buffer, the destination memory address is unknown until the instruction is 710 transferred to memory. In this case, the target address is displayed or 711 parsed as the offset prefixed with the letter "C" (e.g., "LDA C 1200"). In 712 order to present the proper symbolic behavior, the mnemonic formatter and 713 parser must know the source of the request. 714 715 Additionally, display requests from the EXAMINE command have preloaded a 716 value array with the maximum number of words required to encode the longest 717 instruction. This is inefficient, as only a fraction of the instruction set 718 requires more than one word. For EXAMINE commands entered by the user at the 719 SCP prompt, this is unimportant. However, for calls from the CPU instruction 720 trace routine, the overhead is significant. In the latter case, the array is 721 loaded only with a single word, and the mnemonic formatter loads additional 722 words if the specific instruction to be displayed requires them. 723 */ 724 725 typedef enum { 726 Device_Symbol, /* called for an EXAMINE <device> or DEPOSIT <device> command */ 727 CPU_Symbol, /* called for an EXAMINE CPU or DEPOSIT CPU command */ 728 CPU_Trace /* called for a CPU trace command */ 729 } SYMBOL_SOURCE; 730 731 732 /* Calibrated timer numbers */ 733 734 #define TMR_TBG 0 /* the time base generator timer */ 735 #define TMR_POLL 1 /* the input polling timer */ 736 737 #define POLL_RATE 100 /* poll 100 times per second (unless synchronized) */ 738 #define POLL_PERIOD mS (10) /* poll period is 10 milliseconds */ 739 #define POLL_FIRST 1 /* first poll is "immediate" */ 740 741 typedef enum { /* poll synchronization modes */ 742 INITIAL, /* initial synchronization call */ 743 SERVICE /* event service synchronization call */ 744 } POLLMODE; 745 746 747 /* Flip-flops */ 748 749 typedef enum { /* flip-flop values */ 750 CLEAR = 0, /* the flip-flop is clear */ 751 SET = 1 /* the flip-flop is set */ 752 } FLIP_FLOP; 753 754 755 /* Bitset formatting. 756 757 See the comments at the "fmt_bitset" function (hp2100_sys.c) for details of 758 the specification of bitset names and format structures. 759 */ 760 761 typedef enum { /* direction of interpretation */ 762 msb_first, /* left-to-right */ 763 lsb_first /* right-to-left */ 764 } BITSET_DIRECTION; 765 766 typedef enum { /* alternate names */ 767 no_alt, /* no alternates are present in the name array */ 768 has_alt /* the name array contains alternates */ 769 } BITSET_ALTERNATE; 770 771 typedef enum { /* trailing separator */ 772 no_bar, /* omit a trailing separator */ 773 append_bar /* append a trailing separator */ 774 } BITSET_BAR; 775 776 typedef const char * const BITSET_NAME; /* a bit name string pointer */ 777 778 typedef struct { /* bit set format descriptor */ 779 uint32 name_count; /* count of bit names */ 780 BITSET_NAME *names; /* pointer to an array of bit names */ 781 uint32 offset; /* offset from LSB to first bit */ 782 BITSET_DIRECTION direction; /* direction of interpretation */ 783 BITSET_ALTERNATE alternate; /* alternate interpretations presence */ 784 BITSET_BAR bar; /* trailing separator choice */ 785 } BITSET_FORMAT; 786 787 /* Bitset format specifier initialization */ 788 789 #define FMT_INIT(names,offset,dir,alt,bar) \ 790 sizeof (names) / sizeof (names) [0], \ 791 (names), (offset), (dir), (alt), (bar) 792 793 794 /* CPU configuration. 795 796 The CPU exports a "cpu_configuration" word that indicates the current 797 CPU model and firmware option configuration. It is used by the 798 symbolic examine and deposit routines and instruction tracing to 799 determine whether the firmware implementing a given opcode is 800 present. It is a copy of the CPU unit option flags with the encoded 801 CPU model decoded into individual model flag bits. This allows a 802 simple (and fast) AND operation with a firmware feature word to 803 determine applicability, saving the multiple masks and comparisons 804 that would otherwise be required. 805 806 Additionally, the configuration word has the unit CPU model bits set 807 on permanently to permit a base-set feature test for those CPUs that 808 have no options currently enabled (at least one non-option bit must 809 be on for the test to succeed, and the model bits are not otherwise 810 used). 811 812 The 32-bit encoding is: 813 814 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 815 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ 816 | - | - | - | - | - | - | - | - | - | - | - | - | - | - | G | V | 817 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ 818 819 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 820 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ 821 | O | E | D | F | M | I | P | U | B | g | f | e | d | c | b | a | 822 +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ 823 824 Options: 825 826 G = SIGNAL/1000 firmware is present 827 V = Vector Instruction Set firmware is present 828 O = RTE-6/VM VMA and OS firmware is present 829 E = RTE-IV EMA firmware is present 830 D = Double Integer firmware is present 831 F = Fast FORTRAN Processor firmware is present 832 M = Dynamic Mapping System firmware is present 833 I = 2000 I/O Processor firmware is present 834 P = Floating Point hardware or firmware is present 835 U = Extended Arithmetic Unit is present 836 837 CPU Models: 838 839 a = HP 2116 840 b = HP 2115 841 c = HP 2114 842 843 d = HP 2100 844 845 e = HP 1000 M-Series 846 f = HP 1000 E-Series 847 g = HP 1000 F-Series 848 */ 849 850 typedef enum { /* CPU option identifiers */ 851 Option_2116, /* model 2116 CPU */ 852 Option_2115, /* model 2115 CPU */ 853 Option_2114, /* model 2114 CPU */ 854 Option_2100, /* model 2100 CPU */ 855 Option_1000_M, /* model 1000 M-Series CPU */ 856 Option_1000_E, /* model 1000 E-Series CPU */ 857 Option_1000_F, /* model 1000 F-Series CPU */ 858 Option_BASE, /* Base Set firmware */ 859 Option_EAU, /* Extended Arithmetic Unit hardware or firmware */ 860 Option_FP, /* Floating Point hardware or firmware */ 861 Option_IOP, /* 2000 I/O Processor firmware */ 862 Option_DMS, /* Dynamic Mapping System firmware */ 863 Option_FFP, /* Fast FORTRAN Processor firmware */ 864 Option_DBI, /* Double Integer firmware */ 865 Option_EMA, /* RTE-IV EMA firmware */ 866 Option_VMAOS, /* RTE-6/VM VMA and OS firmware */ 867 Option_VIS, /* Vector Instruction Set firmware */ 868 Option_SIGNAL, /* SIGNAL/1000 firmware */ 869 Option_DS /* Distributed Systems firmware */ 870 } OPTION_ID; 871 872 typedef enum { /* CPU options currently installed */ 873 CPU_2116 = (1u << Option_2116), /* model 2116 CPU */ 874 CPU_2115 = (1u << Option_2115), /* model 2115 CPU */ 875 CPU_2114 = (1u << Option_2114), /* model 2114 CPU */ 876 CPU_2100 = (1u << Option_2100), /* model 2100 CPU */ 877 CPU_1000_M = (1u << Option_1000_M), /* model 1000 M-Series CPU */ 878 CPU_1000_E = (1u << Option_1000_E), /* model 1000 E-Series CPU */ 879 CPU_1000_F = (1u << Option_1000_F), /* model 1000 F-Series CPU */ 880 881 CPU_BASE = (1u << Option_BASE), /* Base Set firmware */ 882 CPU_EAU = (1u << Option_EAU), /* Extended Arithmetic Unit hardware or firmware */ 883 CPU_FP = (1u << Option_FP), /* Floating Point hardware or firmware */ 884 CPU_IOP = (1u << Option_IOP), /* 2000 I/O Processor firmware */ 885 CPU_DMS = (1u << Option_DMS), /* Dynamic Mapping System firmware */ 886 CPU_FFP = (1u << Option_FFP), /* Fast FORTRAN Processor firmware */ 887 CPU_DBI = (1u << Option_DBI), /* Double Integer firmware */ 888 CPU_EMA = (1u << Option_EMA), /* RTE-IV EMA firmware */ 889 CPU_VMAOS = (1u << Option_VMAOS), /* RTE-6/VM VMA and OS firmware */ 890 CPU_VIS = (1u << Option_VIS), /* Vector Instruction Set firmware */ 891 CPU_SIGNAL = (1u << Option_SIGNAL), /* SIGNAL/1000 firmware */ 892 CPU_DS = (1u << Option_DS) /* Distributed Systems firmware */ 893 } CPU_OPTION; 894 895 #define CPU_OPTION_SET CPU_OPTION /* a set of CPU_OPTIONs */ 896 897 #define CPU_OPTION_SHIFT (Option_BASE + 1) 898 899 #define CPU_211X (CPU_2116 | CPU_2115 | CPU_2114) 900 #define CPU_21XX (CPU_2116 | CPU_2115 | CPU_2114 | CPU_2100) 901 #define CPU_1000_E_F (CPU_1000_E | CPU_1000_F) 902 #define CPU_1000 (CPU_1000_M | CPU_1000_E | CPU_1000_F) 903 #define CPU_ALL (CPU_211X | CPU_2100 | CPU_1000) 904 905 #define CPU_MODEL_MASK CPU_ALL /* a mask for just the CPU model bits */ 906 #define CPU_OPTION_MASK (~CPU_ALL) /* a mask for just the option bits */ 907 908 909 /* CPU global state */ 910 911 extern CPU_OPTION_SET cpu_configuration; /* the current CPU option set and model */ 912 913 914 /* System interface global data structures */ 915 916 extern const HP_WORD odd_parity [256]; /* a table of parity bits for odd parity */ 917 918 919 /* System interface global SCP support routines declared in scp.h 920 921 extern t_stat sim_load (FILE *fptr, char *cptr, char *fnam, int flag); 922 extern t_stat fprint_sym (FILE *ofile, t_addr addr, t_value *val, UNIT *uptr, int32 sw); 923 extern t_stat parse_sym (char *cptr, t_addr addr, UNIT *uptr, t_value *val, int32 sw); 924 */ 925 926 /* System interface global SCP support routine declarations */ 927 928 extern t_stat hp_attach (UNIT *uptr, char *cptr); 929 extern t_stat hp_set_dib (UNIT *uptr, int32 count, char *cptr, void *desc); 930 extern t_stat hp_show_dib (FILE *st, UNIT *uptr, int32 count, void *desc); 931 932 933 /* System interface global utility routine declarations */ 934 935 extern t_stat fprint_cpu (FILE *ofile, t_addr addr, t_value *val, uint32 radix, SYMBOL_SOURCE source); 936 937 extern const char *fmt_char (uint32 charval); 938 extern const char *fmt_bitset (uint32 bitset, const BITSET_FORMAT bitfmt); 939 940 extern void hp_initialize_trace (uint32 device_max, uint32 flag_max); 941 extern void hp_trace (DEVICE *dptr, uint32 flag, ...); 942 extern void hp_enbdis_pair (DEVICE *ccptr, DEVICE *dcptr); 943 extern void hp_reset_poll (void); 944 extern int32 hp_sync_poll (POLLMODE poll_mode); 945