| /dports/devel/asl/asl-current/include/coldfire/ |
| H A D | mcf5206.inc | 153 DCCR{n} equ Base+11 ; Control Register - Bank n (8b)
154 PS cffield DCCR{n},6,2 ; Port Size
155 BPS cffield DCCR{n},4,2 ; Bank Page Size
156 PM cffield DCCR{n},2,2 ; Page Mode Select
157 WR cfbit DCCR{n},1 ; Write Enable
158 RD cfbit DCCR{n},0 ; Read Enable
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| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F4xx_StdPeriph_Driver/src/ |
| H A D | stm32f4xx_ltdc.c | 403 …LTDC_Layerx->DCCR &= ~(LTDC_LxDCCR_DCBLUE | LTDC_LxDCCR_DCGREEN | LTDC_LxDCCR_DCRED | LTDC_LxDCCR… in LTDC_LayerInit()
404 LTDC_Layerx->DCCR = (LTDC_Layer_InitStruct->LTDC_DefaultColorBlue | dcgreen | \ in LTDC_LayerInit()
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| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/STM32F4xx_StdPeriph_Driver/src/ |
| H A D | stm32f4xx_ltdc.c | 403 …LTDC_Layerx->DCCR &= ~(LTDC_LxDCCR_DCBLUE | LTDC_LxDCCR_DCGREEN | LTDC_LxDCCR_DCRED | LTDC_LxDCCR… in LTDC_LayerInit()
404 LTDC_Layerx->DCCR = (LTDC_Layer_InitStruct->LTDC_DefaultColorBlue | dcgreen | \ in LTDC_LayerInit()
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| /dports/mail/spamassassin/Mail-SpamAssassin-3.4.5/lib/Mail/SpamAssassin/Plugin/ |
| H A D | DCC.pm | 650 $permsgstatus->{tag_data}->{DCCR} = "";
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| /dports/mail/spamassassin-devel/spamassassin-1ea352210/lib/Mail/SpamAssassin/Plugin/ |
| H A D | DCC.pm | 785 $pms->{tag_data}->{DCCR} = '';
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| /dports/devel/avr-libc/avr-libc-2.0.0/include/avr/ |
| H A D | io90scr100.h | 1433 #define DCCR _SFR_MEM8(0xEF) macro
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| /dports/devel/asl/asl-current/include/ |
| H A D | stddef60.inc | 111 __defspr DCCR,0x3fa ; Data Cache Control Register
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| /dports/editors/fpc-ide/fpc-3.2.2/rtl/embedded/arm/ |
| H A D | stm32f429xx.pp | 510 DCCR : longword; // LTDC Layerx Default Color Configuration Register
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| H A D | stm32f746.pp | 496 …DCCR: longword; (*!< LTDC Layerx Default Color Configuration Register Address offs…
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| H A D | stm32f756.pp | 496 …DCCR: longword; (*!< LTDC Layerx Default Color Configuration Register Address offs…
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| /dports/lang/fpc-utils/fpc-3.2.2/rtl/embedded/arm/ |
| H A D | stm32f429xx.pp | 510 DCCR : longword; // LTDC Layerx Default Color Configuration Register
|
| H A D | stm32f746.pp | 496 …DCCR: longword; (*!< LTDC Layerx Default Color Configuration Register Address offs…
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| H A D | stm32f756.pp | 496 …DCCR: longword; (*!< LTDC Layerx Default Color Configuration Register Address offs…
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| /dports/lang/fpc-source/fpc-3.2.2/rtl/embedded/arm/ |
| H A D | stm32f429xx.pp | 510 DCCR : longword; // LTDC Layerx Default Color Configuration Register
|
| H A D | stm32f746.pp | 496 …DCCR: longword; (*!< LTDC Layerx Default Color Configuration Register Address offs…
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| H A D | stm32f756.pp | 496 …DCCR: longword; (*!< LTDC Layerx Default Color Configuration Register Address offs…
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| /dports/lang/fpc/fpc-3.2.2/rtl/embedded/arm/ |
| H A D | stm32f429xx.pp | 510 DCCR : longword; // LTDC Layerx Default Color Configuration Register
|
| H A D | stm32f746.pp | 496 …DCCR: longword; (*!< LTDC Layerx Default Color Configuration Register Address offs…
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| H A D | stm32f756.pp | 496 …DCCR: longword; (*!< LTDC Layerx Default Color Configuration Register Address offs…
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| /dports/net-mgmt/netdisco-mibs/netdisco-mibs-4.010/ceragon/ |
| H A D | ceragon.mib | 4623 (DCCR\DCCM\etc.). "
4680 instead of DCCR line communication. "
9740 "Transmit on the DCCR channel or terminate the DCCR channel."
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| /dports/net-mgmt/observium/observium/mibs/ceragon/ |
| H A D | CERAGON-MIB | 4623 (DCCR\DCCM\etc.). "
4680 instead of DCCR line communication. "
9740 "Transmit on the DCCR channel or terminate the DCCR channel."
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| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f4xx/ |
| H A D | stm32f4xx.h | 1414 …__IO uint32_t DCCR; /*!< LTDC Layerx Default Color Configuration Register Ad… member
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| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f4xx/ |
| H A D | stm32f4xx.h | 1414 …__IO uint32_t DCCR; /*!< LTDC Layerx Default Color Configuration Register Ad… member
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| /dports/devel/binutils/binutils-2.37/cpu/ |
| H A D | cris.cpu | 617 (DCCR 13)
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| /dports/lang/gnatdroid-binutils-x86/binutils-2.27/cpu/ |
| H A D | cris.cpu | 617 (DCCR 13)
|