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Searched refs:DDR_HALF_WIDTH_LOW (Results 1 – 25 of 124) sorted by relevance

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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/mips/mach-ath79/qca953x/
H A Dddr.c79 #define DDR_HALF_WIDTH_LOW BIT(31) macro
83 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
87 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/mips/mach-ath79/qca953x/
H A Dddr.c79 #define DDR_HALF_WIDTH_LOW BIT(31) macro
83 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
87 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dddr.c81 #define DDR_HALF_WIDTH_LOW BIT(31) macro
85 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
89 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dddr.c81 #define DDR_HALF_WIDTH_LOW BIT(31) macro
85 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
89 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dddr.c81 #define DDR_HALF_WIDTH_LOW BIT(31) macro
85 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
89 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dddr.c81 #define DDR_HALF_WIDTH_LOW BIT(31) macro
85 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
89 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dddr.c81 #define DDR_HALF_WIDTH_LOW BIT(31) macro
85 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
89 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/mips/mach-ath79/qca953x/
H A Dddr.c79 #define DDR_HALF_WIDTH_LOW BIT(31) macro
83 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
87 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dddr.c81 #define DDR_HALF_WIDTH_LOW BIT(31) macro
85 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
89 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dddr.c81 #define DDR_HALF_WIDTH_LOW BIT(31) macro
85 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
89 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dddr.c81 #define DDR_HALF_WIDTH_LOW BIT(31) macro
85 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
89 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dddr.c81 #define DDR_HALF_WIDTH_LOW BIT(31) macro
85 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
89 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dddr.c81 #define DDR_HALF_WIDTH_LOW BIT(31) macro
85 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
89 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dddr.c81 #define DDR_HALF_WIDTH_LOW BIT(31) macro
85 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
89 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dddr.c81 #define DDR_HALF_WIDTH_LOW BIT(31) macro
85 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
89 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dddr.c81 #define DDR_HALF_WIDTH_LOW BIT(31) macro
85 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
89 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dddr.c81 #define DDR_HALF_WIDTH_LOW BIT(31) macro
85 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
89 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dddr.c81 #define DDR_HALF_WIDTH_LOW BIT(31) macro
85 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
89 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dddr.c81 #define DDR_HALF_WIDTH_LOW BIT(31) macro
85 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
89 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/mips/mach-ath79/qca953x/
H A Dddr.c79 #define DDR_HALF_WIDTH_LOW BIT(31) macro
83 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
87 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/sysutils/u-boot-cubieboard/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dddr.c81 #define DDR_HALF_WIDTH_LOW BIT(31) macro
85 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
89 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dddr.c81 #define DDR_HALF_WIDTH_LOW BIT(31) macro
85 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
89 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dddr.c81 #define DDR_HALF_WIDTH_LOW BIT(31) macro
85 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
89 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dddr.c81 #define DDR_HALF_WIDTH_LOW BIT(31) macro
85 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
89 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/arch/mips/mach-ath79/qca953x/
H A Dddr.c81 #define DDR_HALF_WIDTH_LOW BIT(31) macro
85 DDR_G_OPEN_L(6) | DDR_HALF_WIDTH_LOW)
89 DDR_G_OPEN_L(8) | DDR_HALF_WIDTH_LOW)

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