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Searched refs:DMAEN (Results 1 – 25 of 169) sorted by relevance

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/dports/devel/msp430-debug-stack/msp430-debug-stack-3.15.0.1/Bios/src/hil/uifv1/
H A Dhil_2w.c80 DMA1CTL |= DMAEN; in INLINE()
88 DMA2CTL |= DMAEN; in INLINE()
150 DMA1CTL |= DMAEN; in INLINE()
158 DMA1CTL |= DMAEN; in INLINE()
164 DMA2CTL |= DMAEN; in INLINE()
195 DMA1CTL |= DMAEN; in INLINE()
203 DMA1CTL |= DMAEN; in INLINE()
209 DMA2CTL |= DMAEN; in INLINE()
240 DMA1CTL |= DMAEN; in INLINE()
248 DMA1CTL |= DMAEN; in INLINE()
[all …]
H A Dhil_4w.c269 DMA1CTL |= DMAEN; // enable DMA1 in _hil_4w_Instr()
312 DMA1CTL |= DMAEN; in _hil_4w_SetReg_XBits08()
313 DMA2CTL |= DMAEN; in _hil_4w_SetReg_XBits08()
354 DMA1CTL |= DMAEN; in _hil_4w_SetReg_XBits16()
355 DMA2CTL |= DMAEN; in _hil_4w_SetReg_XBits16()
400 DMA1CTL |= DMAEN; in _hil_4w_SetReg_XBits20()
401 DMA2CTL |= DMAEN; in _hil_4w_SetReg_XBits20()
500 DMA1CTL |= DMAEN; in _hil_4w_SetReg_XBits32()
501 DMA2CTL |= DMAEN; in _hil_4w_SetReg_XBits32()
550 DMA1CTL |= DMAEN; in _hil_4w_SetReg_XBits64()
[all …]
H A Dhil_4w_432.c263 DMA1CTL |= DMAEN; in hil_4w_432_Instr_4()
276 DMA1CTL |= DMAEN; in hil_4w_432_Instr_4()
281 DMA2CTL |= DMAEN; in hil_4w_432_Instr_4()
304 DMA2CTL |= DMAEN; in hil_4w_432_Instr_4()
336 DMA1CTL |= DMAEN; in hil_4w_432_SetReg_35Bits()
400 DMA2CTL |= DMAEN; in hil_4w_432_SetReg_35Bits()
447 DMA1CTL |= DMAEN; in hil_4w_432_SetReg_XBits32()
483 DMA2CTL |= DMAEN; in hil_4w_432_SetReg_XBits32()
/dports/devel/msp430-debug-stack/msp430-debug-stack-3.15.0.1/Bios/src/fw/fet/USB_API/USB_Common/
H A Ddma.c126 DMA0CTL |= DMAEN; //enable DMAx in memcpyDMA0()
132 DMA0CTL &= ~DMAEN; //disable DMAx in memcpyDMA0()
149 DMA1CTL |= DMAEN; //enable DMAx in memcpyDMA1()
155 DMA1CTL &= ~DMAEN; //disable DMAx in memcpyDMA1()
172 DMA2CTL |= DMAEN; //enable DMAx in memcpyDMA2()
178 DMA2CTL &= ~DMAEN; //disable DMAx in memcpyDMA2()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/bf548-ezkit/
H A Dvideo.c202 bfin_write_DMA12_CONFIG(bfin_read_DMA12_CONFIG() | DMAEN); in EnableDMA()
207 bfin_write_DMA12_CONFIG(bfin_read_DMA12_CONFIG() & ~DMAEN); in DisableDMA()
273 bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16 | DMA2D); in dma_bitblit()
275 bfin_write_MDMA_D0_CONFIG(WNR | DMAEN | WDSIZE_16 | DMA2D); in dma_bitblit()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/cm-bf548/
H A Dvideo.c202 bfin_write_DMA12_CONFIG(bfin_read_DMA12_CONFIG() | DMAEN); in EnableDMA()
207 bfin_write_DMA12_CONFIG(bfin_read_DMA12_CONFIG() & ~DMAEN); in DisableDMA()
273 bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16 | DMA2D); in dma_bitblit()
275 bfin_write_MDMA_D0_CONFIG(WNR | DMAEN | WDSIZE_16 | DMA2D); in dma_bitblit()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/bf527-ezkit/
H A Dvideo.c219 bfin_write_DMA0_CONFIG(bfin_read_DMA0_CONFIG() | DMAEN); in EnableDMA()
224 bfin_write_DMA0_CONFIG(bfin_read_DMA0_CONFIG() & ~DMAEN); in DisableDMA()
372 bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16 | DMA2D); in dma_bitblit()
374 bfin_write_MDMA_D0_CONFIG(WNR | DMAEN | WDSIZE_16 | DMA2D); in dma_bitblit()
/dports/devel/gdb761/gdb-7.6.1/sim/testsuite/sim/bfin/
H A Dmdma-skel.h31 s->config = DMAEN | wdsize; in _mdma_memcpy()
32 d->config = WNR | DI_EN | DMAEN | wdsize; in _mdma_memcpy()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/lib/
H A Dstring.c185 bfin_write_MDMA_S0_CONFIG(wdsize | DMAEN); in dma_memcpy_nocache()
186 bfin_write_MDMA_D0_CONFIG(wdsize | DMAEN | WNR | DI_EN); in dma_memcpy_nocache()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/lib/
H A Dstring.c185 bfin_write_MDMA_S0_CONFIG(wdsize | DMAEN); in dma_memcpy_nocache()
186 bfin_write_MDMA_D0_CONFIG(wdsize | DMAEN | WNR | DI_EN); in dma_memcpy_nocache()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/blackfin/lib/
H A Dstring.c185 bfin_write_MDMA_S0_CONFIG(wdsize | DMAEN); in dma_memcpy_nocache()
186 bfin_write_MDMA_D0_CONFIG(wdsize | DMAEN | WNR | DI_EN); in dma_memcpy_nocache()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/lib/
H A Dstring.c185 bfin_write_MDMA_S0_CONFIG(wdsize | DMAEN); in dma_memcpy_nocache()
186 bfin_write_MDMA_D0_CONFIG(wdsize | DMAEN | WNR | DI_EN); in dma_memcpy_nocache()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/blackfin/lib/
H A Dstring.c185 bfin_write_MDMA_S0_CONFIG(wdsize | DMAEN); in dma_memcpy_nocache()
186 bfin_write_MDMA_D0_CONFIG(wdsize | DMAEN | WNR | DI_EN); in dma_memcpy_nocache()
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/blackfin/lib/
H A Dstring.c185 bfin_write_MDMA_S0_CONFIG(wdsize | DMAEN); in dma_memcpy_nocache()
186 bfin_write_MDMA_D0_CONFIG(wdsize | DMAEN | WNR | DI_EN); in dma_memcpy_nocache()
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/lib/
H A Dstring.c185 bfin_write_MDMA_S0_CONFIG(wdsize | DMAEN); in dma_memcpy_nocache()
186 bfin_write_MDMA_D0_CONFIG(wdsize | DMAEN | WNR | DI_EN); in dma_memcpy_nocache()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/blackfin/lib/
H A Dstring.c179 bfin_write(&mdma_s0->config, dsize | DMAEN); in dma_memcpy_nocache()
180 bfin_write(&mdma_d0->config, dsize | DMAEN | WNR | DI_EN); in dma_memcpy_nocache()
/dports/devel/gdb761/gdb-7.6.1/sim/bfin/
H A Ddv-bfin_dma.h25 #define DMAEN 0x0001 /* DMA Channel Enable */ macro
/dports/devel/avr-gdb/gdb-7.3.1/sim/bfin/
H A Ddv-bfin_dma.h27 #define DMAEN 0x0001 /* DMA Channel Enable */ macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/
H A Ddma.h9 #define DMAEN 0x0001 /* DMA Channel Enable */ macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/
H A Ddma.h9 #define DMAEN 0x0001 /* DMA Channel Enable */ macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/
H A Ddma.h9 #define DMAEN 0x0001 /* DMA Channel Enable */ macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/
H A Ddma.h9 #define DMAEN 0x0001 /* DMA Channel Enable */ macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/
H A Ddma.h9 #define DMAEN 0x0001 /* DMA Channel Enable */ macro
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/
H A Ddma.h9 #define DMAEN 0x0001 /* DMA Channel Enable */ macro
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/blackfin/include/asm/mach-common/bits/
H A Ddma.h9 #define DMAEN 0x0001 /* DMA Channel Enable */ macro

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