/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/Mips/cheri/ |
H A D | addrfolder-bad-killed-reg5.mir | 86 ; CHECK: [[DSLL:%[0-9]+]]:gpr64 = DSLL [[CAPLOAD16_]], 2 90 …; CHECK: CAPSTORE32 killed $zero, [[DSLL]], 0, killed [[CIncOffsetImm1]] :: (store 4 into %ir.2,… 91 ; CHECK: [[DSLL1:%[0-9]+]]:gpr64 = DSLL killed [[CAPLOAD16_]], 2 96 …; CHECK: CAPSTORE32 killed $zero, [[DSLL]], 0, [[CIncOffsetImm]] :: (store 4 into %ir.2, addrspa… 104 %5:gpr64 = DSLL %4, 2 110 %9:gpr64 = DSLL killed %4, 2
|
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/Mips/llvm-ir/ |
H A D | load.ll | 78 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 86 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 106 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 114 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 217 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 225 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 245 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 253 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 357 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 365 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
H A D | store.ll | 75 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 83 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 103 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 111 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 185 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 193 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 213 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 299 ; MIPS4-NEXT: dsll $2, $2, 16 # <MCInst #{{[0-9]+}} DSLL 307 ; MIPS4-NEXT: dsll $2, $2, 16 # <MCInst #{{[0-9]+}} DSLL 445 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/Mips/llvm-ir/ |
H A D | load.ll | 76 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 84 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 104 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 112 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 215 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 223 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 243 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 251 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 355 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 363 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
H A D | store.ll | 75 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 83 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 103 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 111 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 185 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 193 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 213 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 299 ; MIPS4-NEXT: dsll $2, $2, 16 # <MCInst #{{[0-9]+}} DSLL 307 ; MIPS4-NEXT: dsll $2, $2, 16 # <MCInst #{{[0-9]+}} DSLL 445 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/Mips/llvm-ir/ |
H A D | load.ll | 76 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 84 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 104 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 112 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 215 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 223 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 243 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 251 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 355 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 363 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
H A D | store.ll | 75 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 83 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 103 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 111 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 185 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 193 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 213 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 295 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 303 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 437 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/Mips/llvm-ir/ |
H A D | load.ll | 76 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 84 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 104 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 112 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 215 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 223 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 243 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 251 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 355 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 363 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
H A D | store.ll | 75 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 83 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 103 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 111 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 185 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 193 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 213 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 295 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 303 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 437 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/Mips/llvm-ir/ |
H A D | load.ll | 76 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 84 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 104 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 112 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 215 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 223 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 243 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 251 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 355 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 363 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
H A D | store.ll | 75 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 83 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 103 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 111 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 185 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 193 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 213 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 299 ; MIPS4-NEXT: dsll $2, $2, 16 # <MCInst #{{[0-9]+}} DSLL 307 ; MIPS4-NEXT: dsll $2, $2, 16 # <MCInst #{{[0-9]+}} DSLL 445 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/Mips/llvm-ir/ |
H A D | load.ll | 76 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 84 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 104 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 112 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 215 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 223 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 243 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 251 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 355 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 363 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
H A D | store.ll | 75 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 83 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 103 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 111 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 185 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 193 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 213 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 299 ; MIPS4-NEXT: dsll $2, $2, 16 # <MCInst #{{[0-9]+}} DSLL 307 ; MIPS4-NEXT: dsll $2, $2, 16 # <MCInst #{{[0-9]+}} DSLL 445 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/Mips/llvm-ir/ |
H A D | load.ll | 76 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 84 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 104 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 112 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 215 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 223 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 243 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 251 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 355 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 363 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
H A D | store.ll | 75 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 83 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 103 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 111 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 185 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 193 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 213 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 295 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 303 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 437 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/Mips/llvm-ir/ |
H A D | load.ll | 76 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 84 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 104 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 112 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 215 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 223 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 243 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 251 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 355 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 363 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/Mips/llvm-ir/ |
H A D | load.ll | 76 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 84 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 104 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 112 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 215 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 223 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 243 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 251 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 355 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 363 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
H A D | store.ll | 75 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 83 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 103 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 111 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 185 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 193 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 213 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 299 ; MIPS4-NEXT: dsll $2, $2, 16 # <MCInst #{{[0-9]+}} DSLL 307 ; MIPS4-NEXT: dsll $2, $2, 16 # <MCInst #{{[0-9]+}} DSLL 445 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/Mips/llvm-ir/ |
H A D | load.ll | 76 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 84 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 104 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 112 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 215 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 223 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 243 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 251 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 355 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 363 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
H A D | store.ll | 75 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 83 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 103 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 111 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 185 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 193 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 213 ; MIPS64R6-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 299 ; MIPS4-NEXT: dsll $2, $2, 16 # <MCInst #{{[0-9]+}} DSLL 307 ; MIPS4-NEXT: dsll $2, $2, 16 # <MCInst #{{[0-9]+}} DSLL 445 ; MIPS4-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
/dports/devel/llvm90/llvm-9.0.1.src/test/CodeGen/Mips/llvm-ir/ |
H A D | load.ll | 76 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 84 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 104 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 112 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 215 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 223 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 243 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 251 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 355 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 363 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
/dports/devel/llvm80/llvm-8.0.1.src/test/CodeGen/Mips/llvm-ir/ |
H A D | load.ll | 76 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 84 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 104 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 112 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 215 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 223 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 243 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 251 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 355 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 363 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/Mips/llvm-ir/ |
H A D | load.ll | 76 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 84 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 104 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 112 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 215 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 223 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 243 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 251 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 355 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 363 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/Mips/llvm-ir/ |
H A D | load.ll | 76 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 84 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 104 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 112 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 215 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 223 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 243 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 251 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 355 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 363 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|
/dports/devel/llvm70/llvm-7.0.1.src/test/CodeGen/Mips/llvm-ir/ |
H A D | load.ll | 76 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 84 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 104 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 112 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 215 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 223 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 243 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 251 ; MIPS64-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 355 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL 363 ; MIPS3-NEXT: dsll $1, $1, 16 # <MCInst #{{[0-9]+}} DSLL [all …]
|