1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2## Regression test found when compiling CheriBSD libc
3# RUN: %cheri_purecap_llc -run-pass=cheriaddrmodefolder -verify-machineinstrs -o - %s | FileCheck %s
4--- |
5  target datalayout = "E-m:e-pf200:128:128:128:64-i8:8:32-i16:16:32-i64:64-n32:64-S128-A200-P200-G200"
6  target triple = "cheri-unknown-freebsd"
7
8  @a = external addrspace(200) global i32, align 4
9  @b = external local_unnamed_addr addrspace(200) global i16, align 2
10
11  ; Function Attrs: nounwind
12  define void @d() local_unnamed_addr addrspace(200) #0 {
13  entry:
14    %0 = load i16, i16 addrspace(200)* @b, align 2
15    %idx.ext = sext i16 %0 to i64
16    %add.ptr = getelementptr inbounds i32, i32 addrspace(200)* @a, i64 %idx.ext
17    br label %for.cond
18
19  for.cond:                                         ; preds = %for.cond, %entry
20    %1 = bitcast i32 addrspace(200)* %add.ptr to i8 addrspace(200)*
21    %sunkaddr = getelementptr inbounds i8, i8 addrspace(200)* %1, i64 1
22    %2 = bitcast i8 addrspace(200)* %sunkaddr to i32 addrspace(200)*
23    store i32 0, i32 addrspace(200)* %2, align 4
24    br label %for.cond
25  }
26
27  attributes #0 = { nounwind }
28
29...
30---
31name:            d
32alignment:       8
33exposesReturnsTwice: false
34legalized:       false
35regBankSelected: false
36selected:        false
37failedISel:      false
38tracksRegLiveness: true
39hasWinCFI:       false
40registers:
41  - { id: 0, class: cherigpr, preferred-register: '' }
42  - { id: 1, class: cherigpr, preferred-register: '' }
43  - { id: 2, class: gpr64, preferred-register: '' }
44  - { id: 3, class: cherigpr, preferred-register: '' }
45  - { id: 4, class: gpr64, preferred-register: '' }
46  - { id: 5, class: gpr64, preferred-register: '' }
47  - { id: 6, class: cherigpr, preferred-register: '' }
48  - { id: 7, class: cherigpr, preferred-register: '' }
49  - { id: 8, class: gpr32, preferred-register: '' }
50  - { id: 9, class: gpr64, preferred-register: '' }
51  - { id: 10, class: cherigpr, preferred-register: '' }
52  - { id: 11, class: cherigpr, preferred-register: '' }
53  - { id: 12, class: cherigpr, preferred-register: '' }
54liveins:         []
55frameInfo:
56  isFrameAddressTaken: false
57  isReturnAddressTaken: false
58  hasStackMap:     false
59  hasPatchPoint:   false
60  stackSize:       0
61  offsetAdjustment: 0
62  maxAlignment:    1
63  adjustsStack:    false
64  hasCalls:        false
65  stackProtector:  ''
66  maxCallFrameSize: 4294967295
67  cvBytesOfCalleeSavedRegisters: 0
68  hasOpaqueSPAdjustment: false
69  hasVAStart:      false
70  hasMustTailInVarArgFunc: false
71  localFrameSize:  0
72  savePoint:       ''
73  restorePoint:    ''
74fixedStack:      []
75stack:           []
76callSites:       []
77constants:       []
78machineFunctionInfo: {}
79body:             |
80  ; CHECK-LABEL: name: d
81  ; CHECK: bb.0.entry:
82  ; CHECK:   successors: %bb.1(0x80000000)
83  ; CHECK:   [[PseudoPccRelativeAddressPostRA:%[0-9]+]]:cherigpr = PseudoPccRelativeAddressPostRA &_CHERI_CAPABILITY_TABLE_, implicit-def dead early-clobber %2
84  ; CHECK:   [[LOADCAP_BigImm:%[0-9]+]]:cherigpr = LOADCAP_BigImm target-flags(mips-captable20) @b, [[PseudoPccRelativeAddressPostRA]] :: (load 16 from cap-table)
85  ; CHECK:   [[CAPLOAD16_:%[0-9]+]]:gpr64 = CAPLOAD16 $zero_64, 0, killed [[LOADCAP_BigImm]] :: (dereferenceable load 2 from @b, addrspace 200)
86  ; CHECK:   [[DSLL:%[0-9]+]]:gpr64 = DSLL [[CAPLOAD16_]], 2
87  ; CHECK:   [[LOADCAP_BigImm1:%[0-9]+]]:cherigpr = LOADCAP_BigImm target-flags(mips-captable20) @a, [[PseudoPccRelativeAddressPostRA]] :: (load 16 from cap-table)
88  ; CHECK:   [[CIncOffsetImm:%[0-9]+]]:cherigpr = CIncOffsetImm [[LOADCAP_BigImm1]], 1
89  ; CHECK:   [[CIncOffsetImm1:%[0-9]+]]:cherigpr = CIncOffsetImm [[LOADCAP_BigImm1]], 1
90  ; CHECK:   CAPSTORE32 killed $zero, [[DSLL]], 0, killed [[CIncOffsetImm1]] :: (store 4 into %ir.2, addrspace 200)
91  ; CHECK:   [[DSLL1:%[0-9]+]]:gpr64 = DSLL killed [[CAPLOAD16_]], 2
92  ; CHECK:   [[CIncOffsetImm2:%[0-9]+]]:cherigpr = CIncOffsetImm [[LOADCAP_BigImm1]], 1
93  ; CHECK:   CAPSTORE32 killed $zero, killed [[DSLL1]], 0, killed [[CIncOffsetImm2]] :: (store 4 into %ir.2, addrspace 200)
94  ; CHECK: bb.1.for.cond:
95  ; CHECK:   successors: %bb.1(0x80000000)
96  ; CHECK:   CAPSTORE32 killed $zero, [[DSLL]], 0, [[CIncOffsetImm]] :: (store 4 into %ir.2, addrspace 200)
97  ; CHECK:   B %bb.1, implicit-def dead $at
98  bb.0.entry:
99    successors: %bb.1(0x80000000)
100
101    %1:cherigpr = PseudoPccRelativeAddressPostRA &_CHERI_CAPABILITY_TABLE_, implicit-def dead early-clobber %2
102    %3:cherigpr = LOADCAP_BigImm target-flags(mips-captable20) @b, %1 :: (load 16 from cap-table)
103    %4:gpr64 = CAPLOAD16 $zero_64, 0, killed %3 :: (dereferenceable load 2 from @b, addrspace 200)
104    %5:gpr64 = DSLL %4, 2
105    %6:cherigpr = LOADCAP_BigImm target-flags(mips-captable20) @a, %1 :: (load 16 from cap-table)
106    %0:cherigpr = CIncOffset %6, killed %5
107    %7:cherigpr = CIncOffsetImm %0, 1
108    %10:cherigpr = CIncOffsetImm %0, 1
109    CAPSTORE32 killed $zero, $zero_64, 0, killed %10 :: (store 4 into %ir.2, addrspace 200)
110    %9:gpr64 = DSLL killed %4, 2
111    %11:cherigpr = CIncOffset killed %6, killed %9
112    %12:cherigpr = CIncOffsetImm %11, 1
113    CAPSTORE32 killed $zero, $zero_64, 0, killed %12 :: (store 4 into %ir.2, addrspace 200)
114
115  bb.1.for.cond:
116    successors: %bb.1(0x80000000)
117    ; The addressing folder would previously hoist %5 here, but mark it as killed.
118    ; This is not valid since there is a branch to the same basic block at the end and %5 must be live
119    CAPSTORE32 killed $zero, $zero_64, 0, %7 :: (store 4 into %ir.2, addrspace 200)
120    B %bb.1, implicit-def dead $at
121
122...
123