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Searched refs:ENABLE_WRAP_TO_INCR_BURSTS (Results 1 – 10 of 10) sorted by relevance

/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/nvidia/tegra/include/t210/
H A Dtegra_def.h87 #define ENABLE_WRAP_TO_INCR_BURSTS (ENABLE_WRAP_INCR_MASTER2_BIT | \ macro
/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/nvidia/tegra/include/t210/
H A Dtegra_def.h87 #define ENABLE_WRAP_TO_INCR_BURSTS (ENABLE_WRAP_INCR_MASTER2_BIT | \ macro
/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/nvidia/tegra/include/t210/
H A Dtegra_def.h87 #define ENABLE_WRAP_TO_INCR_BURSTS (ENABLE_WRAP_INCR_MASTER2_BIT | \ macro
/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/nvidia/tegra/include/t210/
H A Dtegra_def.h87 #define ENABLE_WRAP_TO_INCR_BURSTS (ENABLE_WRAP_INCR_MASTER2_BIT | \ macro
/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/nvidia/tegra/include/t210/
H A Dtegra_def.h87 #define ENABLE_WRAP_TO_INCR_BURSTS (ENABLE_WRAP_INCR_MASTER2_BIT | \ macro
/dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/plat/nvidia/tegra/soc/t210/
H A Dplat_psci_handlers.c472 val |= ENABLE_WRAP_TO_INCR_BURSTS; in tegra_soc_pwr_domain_on_finish()
/dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/plat/nvidia/tegra/soc/t210/
H A Dplat_psci_handlers.c472 val |= ENABLE_WRAP_TO_INCR_BURSTS; in tegra_soc_pwr_domain_on_finish()
/dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/plat/nvidia/tegra/soc/t210/
H A Dplat_psci_handlers.c472 val |= ENABLE_WRAP_TO_INCR_BURSTS; in tegra_soc_pwr_domain_on_finish()
/dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/plat/nvidia/tegra/soc/t210/
H A Dplat_psci_handlers.c472 val |= ENABLE_WRAP_TO_INCR_BURSTS; in tegra_soc_pwr_domain_on_finish()
/dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/plat/nvidia/tegra/soc/t210/
H A Dplat_psci_handlers.c472 val |= ENABLE_WRAP_TO_INCR_BURSTS; in tegra_soc_pwr_domain_on_finish()