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Searched refs:FPSCR_END (Results 1 – 12 of 12) sorted by relevance

/dports/devel/avr-gdb/gdb-7.3.1/sim/ppc/
H A Dppc-instructions3764 FPSCR_END(Rc);
3790 FPSCR_END(Rc);
3816 FPSCR_END(Rc);
3842 FPSCR_END(Rc);
3868 FPSCR_END(Rc);
3894 FPSCR_END(Rc);
3927 FPSCR_END(Rc);
3960 FPSCR_END(Rc);
4638 FPSCR_END(0);
4666 FPSCR_END(0);
[all …]
H A Didecode_expression.h320 #define FPSCR_END(Rc) { \ macro
H A DChangeLog1037 * idecode_expression.h (FPSCR_END): Always update FEX and VX bits
1039 (FPSCR_END): Explicitly check for possible floating point
/dports/devel/gdb761/gdb-7.6.1/sim/ppc/
H A Dppc-instructions3763 FPSCR_END(Rc);
3789 FPSCR_END(Rc);
3815 FPSCR_END(Rc);
3841 FPSCR_END(Rc);
3867 FPSCR_END(Rc);
3893 FPSCR_END(Rc);
3926 FPSCR_END(Rc);
3959 FPSCR_END(Rc);
4637 FPSCR_END(0);
4665 FPSCR_END(0);
[all …]
H A Didecode_expression.h319 #define FPSCR_END(Rc) { \ macro
H A DChangeLog1098 * idecode_expression.h (FPSCR_END): Always update FEX and VX bits
1100 (FPSCR_END): Explicitly check for possible floating point
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/gdb/sim/ppc/
H A Dppc-instructions3744 FPSCR_END(Rc);
3770 FPSCR_END(Rc);
3796 FPSCR_END(Rc);
3822 FPSCR_END(Rc);
3848 FPSCR_END(Rc);
3874 FPSCR_END(Rc);
3907 FPSCR_END(Rc);
3940 FPSCR_END(Rc);
4602 FPSCR_END(0);
4630 FPSCR_END(0);
[all …]
H A Didecode_expression.h320 #define FPSCR_END(Rc) { \ macro
H A DChangeLog702 * idecode_expression.h (FPSCR_END): Always update FEX and VX bits
704 (FPSCR_END): Explicitly check for possible floating point
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/gdb/sim/ppc/
H A Dppc-instructions3744 FPSCR_END(Rc);
3770 FPSCR_END(Rc);
3796 FPSCR_END(Rc);
3822 FPSCR_END(Rc);
3848 FPSCR_END(Rc);
3874 FPSCR_END(Rc);
3907 FPSCR_END(Rc);
3940 FPSCR_END(Rc);
4602 FPSCR_END(0);
4630 FPSCR_END(0);
[all …]
H A Didecode_expression.h320 #define FPSCR_END(Rc) { \ macro
H A DChangeLog702 * idecode_expression.h (FPSCR_END): Always update FEX and VX bits
704 (FPSCR_END): Explicitly check for possible floating point