Searched refs:Get_Left_Limit (Results 1 – 19 of 19) sorted by relevance
/dports/cad/ghdl/ghdl-1.0.0/src/vhdl/ |
H A D | vhdl-evaluation.adb | 293 Set_Left_Limit (Res, Get_Left_Limit (Range_Expr)); 324 Left : constant Iir := Get_Left_Limit (A_Range); 530 Rng_Start := Get_Left_Limit (Rng); 2340 Lit := Create_Bound (Get_Left_Limit (Rng)); 2798 Left := Eval_Pos (Get_Left_Limit (Rng)); 3437 if Val < Eval_Pos (Get_Left_Limit (Bound)) 3443 if Val > Eval_Pos (Get_Left_Limit (Bound)) 3464 Left := Get_Value (Get_Left_Limit (Bound)); 3765 Left := Eval_Pos (Get_Left_Limit (Constraint)); 3804 Left := Eval_Pos (Get_Left_Limit (Rng)); [all …]
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H A D | vhdl-utils.adb | 913 Free_Recursive (Get_Left_Limit (N)); 1581 Low := Get_Left_Limit (Arange); 1584 High := Get_Left_Limit (Arange); 1593 return Get_Left_Limit (Arange); 1605 return Get_Left_Limit (Arange);
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H A D | vhdl-std_package.adb | 1423 Change_Unit (Get_Left_Limit (Rng), Prim); 1429 Change_Unit (Get_Left_Limit (Rng), Prim);
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H A D | vhdl-sem_types.adb | 283 case Get_Kind (Get_Base_Type (Get_Type (Get_Left_Limit (Rng)))) is 331 Set_Type (Get_Left_Limit (Rng), Base_Type); 438 Lit := Get_Left_Limit (Range_Expr1);
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H A D | vhdl-sem_assocs.adb | 558 if not Eval_Is_Eq (Get_Left_Limit (Src_Range), 559 Get_Left_Limit (Dst_Range))
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H A D | vhdl-sem.adb | 1612 if not Are_Trees_Equal (Get_Left_Limit (Left), 1613 Get_Left_Limit (Right))
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H A D | vhdl-canon.adb | 219 (Get_Left_Limit (Expr), Sensitivity_List, False); 649 Canon_Expression (Get_Left_Limit (Expr));
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H A D | vhdl-nodes.ads | 8136 function Get_Left_Limit (Decl : Iir_Range_Expression) return Iir; subprogspec
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H A D | vhdl-nodes.adb | 3756 function Get_Left_Limit (Decl : Iir_Range_Expression) return Iir is subprogram 3762 end Get_Left_Limit;
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H A D | vhdl-prints.adb | 321 Get_Left_Limit (Rng)));
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H A D | vhdl-nodes_meta.adb | 6167 return Get_Left_Limit (N);
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/dports/cad/ghdl/ghdl-1.0.0/src/vhdl/translate/ |
H A D | trans-chap6.adb | 347 B := Eval_Pos (Get_Left_Limit (Index_Range)); 635 Prefix_Left := Eval_Pos (Get_Left_Limit (Index_Range)); 636 Slice_Left := Eval_Pos (Get_Left_Limit (Slice_Range));
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H A D | trans-chap7.adb | 620 Bound : constant Iir := Get_Left_Limit (Expr); 669 Left := Chap7.Translate_Expression (Get_Left_Limit (Expr)); 735 Left := Chap7.Translate_Expression (Get_Left_Limit (Expr)); 4602 Left_Pat := Get_Length_Pattern (Get_Left_Limit (Rng), True);
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H A D | trans-chap3.adb | 2163 and then Get_Left_Limit (Rng) = Get_Left_Limit (Tm_Rng)
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/dports/cad/ghdl/ghdl-1.0.0/src/synth/ |
H A D | synth-decls.adb | 307 L := Get_Value (Get_Left_Limit (Cst)); 321 L := Get_Fp_Value (Get_Left_Limit (Cst));
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H A D | synth-expr.adb | 446 L := Synth_Expression_With_Basetype (Syn_Inst, Get_Left_Limit (Rng)); 474 L := Synth_Expression (Syn_Inst, Get_Left_Limit (Rng)); 685 Limit := Int32 (Eval_Pos (Get_Left_Limit (Rng))); 1507 (Syn_Inst, Get_Left_Limit (Expr));
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/dports/cad/ghdl/ghdl-1.0.0/src/vhdl/simulate/ |
H A D | simul-elaboration.adb | 857 (Execute_Expression (Instance, Get_Left_Limit (Rc)), 889 (Execute_Expression (Instance, Get_Left_Limit (Rc)),
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H A D | simul-execution.adb | 2306 (Execute_Expression (Block, Get_Left_Limit (Prefix)),
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/dports/cad/ghdl/ghdl-1.0.0/pyGHDL/libghdl/vhdl/ |
H A D | nodes.py | 2179 Get_Left_Limit = libghdl.vhdl__nodes__get_left_limit variable
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