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Searched refs:INT_IRQ (Results 1 – 25 of 57) sorted by relevance

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/dports/games/libretro-mame2000/mame2000-libretro-e364a15/src/cpu/nec_armnec/
H A Darmnecintrf.c30 #define INT_IRQ 0x01 macro
242 ARMNEC.pending_irq &= ~INT_IRQ; in armnec_set_irq_line()
247 ARMNEC.pending_irq |= INT_IRQ; in armnec_set_irq_line()
264 ARMNEC.pending_irq &= ~INT_IRQ; in armv30_interrupt()
281 ARMNEC.pending_irq &= ~INT_IRQ; in armv33_interrupt()
/dports/emulators/mess/mame-mame0226/src/devices/cpu/nec/
H A Dv25.cpp199 m_unmasked_irq = INT_IRQ | NMI_IRQ; in device_reset()
262 case INT_IRQ: /* get vector */ in nec_interrupt()
462 else if (pending & INT_IRQ) in external_int()
466 nec_interrupt((uint32_t)-1, INT_IRQ); in external_int()
468 m_pending_irq &= ~INT_IRQ; in external_int()
488 m_pending_irq &= ~INT_IRQ; in execute_set_input()
491 m_pending_irq |= INT_IRQ; in execute_set_input()
H A Dnec.cpp327 if (source == INT_IRQ) /* get vector */ in nec_interrupt()
373 nec_interrupt((uint32_t)-1, INT_IRQ); in external_int()
375 m_pending_irq &= ~INT_IRQ; in external_int()
392 m_pending_irq &= ~INT_IRQ; in set_int_line()
395 m_pending_irq |= INT_IRQ; in set_int_line()
H A Dnecpriv.ipp25 INT_IRQ = 1,
/dports/emulators/mame/mame-mame0226/src/devices/cpu/nec/
H A Dv25.cpp199 m_unmasked_irq = INT_IRQ | NMI_IRQ; in device_reset()
262 case INT_IRQ: /* get vector */ in nec_interrupt()
462 else if (pending & INT_IRQ) in external_int()
466 nec_interrupt((uint32_t)-1, INT_IRQ); in external_int()
468 m_pending_irq &= ~INT_IRQ; in external_int()
488 m_pending_irq &= ~INT_IRQ; in execute_set_input()
491 m_pending_irq |= INT_IRQ; in execute_set_input()
H A Dnec.cpp327 if (source == INT_IRQ) /* get vector */ in nec_interrupt()
373 nec_interrupt((uint32_t)-1, INT_IRQ); in external_int()
375 m_pending_irq &= ~INT_IRQ; in external_int()
392 m_pending_irq &= ~INT_IRQ; in set_int_line()
395 m_pending_irq |= INT_IRQ; in set_int_line()
H A Dnecpriv.ipp25 INT_IRQ = 1,
/dports/emulators/hugo/hugo-2.12/
H A Dgfx.c389 return_value = INT_IRQ; in Loop6502()
405 return_value = INT_IRQ; in Loop6502()
548 if (return_value == INT_IRQ) in Loop6502()
555 return_value = INT_IRQ; in Loop6502()
573 if ((return_value != INT_IRQ) && io.vdc_pendvsync) in Loop6502()
576 return_value = INT_IRQ; in Loop6502()
580 if (return_value == INT_IRQ) in Loop6502()
H A Dpce.c1799 ret = INT_IRQ; in Loop6502()
1836 ret = INT_IRQ; in Loop6502()
1871 if (ret == INT_IRQ) in Loop6502()
1878 ret = INT_IRQ; in Loop6502()
1890 ret = INT_IRQ; in Loop6502()
1898 else if (io.vdc_pendvsync && ret != INT_IRQ) in Loop6502()
1905 ret = INT_IRQ; in Loop6502()
1908 if (ret == INT_IRQ) in Loop6502()
H A Dh6280.h256 #define INT_IRQ 1 /* Standard IRQ interrupt */ macro
/dports/games/libretro-fbalpha/fbalpha-84eb9d9/src/cpu/nec/
H A Dnec.cpp258 if (source == INT_IRQ) /* get vector */ in nec_interrupt()
288 nec_interrupt(nec_state, (UINT32)-1, INT_IRQ); in external_int()
290 nec_state->pending_irq &= ~INT_IRQ; in external_int()
311 nec_state->pending_irq &= ~INT_IRQ; in nec_set_irq_line_and_vector()
315 nec_state->pending_irq |= INT_IRQ; in nec_set_irq_line_and_vector()
609 …case CPUINFO_INT_INPUT_STATE + 0: info->i = (nec_state->pending_irq & INT_IRQ) ? ASSERT_LINE :…
H A Dv25.cpp198 nec_state->unmasked_irq = INT_IRQ | NMI_IRQ; in v25_reset()
259 case INT_IRQ: /* get vector */ in nec_interrupt()
366 else if (pending & INT_IRQ) in external_int()
370 nec_interrupt(nec_state, (UINT32)-1, INT_IRQ); in external_int()
372 nec_state->pending_irq &= ~INT_IRQ; in external_int()
395 nec_state->pending_irq &= ~INT_IRQ; in v25_set_irq_line_and_vector()
398 nec_state->pending_irq |= INT_IRQ; in v25_set_irq_line_and_vector()
728 …case CPUINFO_INT_INPUT_STATE + 0: info->i = (nec_state->pending_irq & INT_IRQ) ? ASSERT_LINE …
H A Dnecpriv.h28 INT_IRQ = 1, enumerator
/dports/games/libretro-fbneo/FBNeo-bbe3c05/src/cpu/nec/
H A Dv25.cpp198 nec_state->unmasked_irq = INT_IRQ | NMI_IRQ; in v25_reset()
259 case INT_IRQ: /* get vector */ in nec_interrupt()
366 else if (pending & INT_IRQ) in external_int()
370 nec_interrupt(nec_state, (UINT32)-1, INT_IRQ); in external_int()
372 nec_state->pending_irq &= ~INT_IRQ; in external_int()
395 nec_state->pending_irq &= ~INT_IRQ; in v25_set_irq_line_and_vector()
398 nec_state->pending_irq |= INT_IRQ; in v25_set_irq_line_and_vector()
730 …case CPUINFO_INT_INPUT_STATE + 0: info->i = (nec_state->pending_irq & INT_IRQ) ? ASSERT_LINE …
H A Dnec.cpp258 if (source == INT_IRQ) /* get vector */ in nec_interrupt()
288 nec_interrupt(nec_state, (UINT32)-1, INT_IRQ); in external_int()
290 nec_state->pending_irq &= ~INT_IRQ; in external_int()
311 nec_state->pending_irq &= ~INT_IRQ; in nec_set_irq_line_and_vector()
315 nec_state->pending_irq |= INT_IRQ; in nec_set_irq_line_and_vector()
616 …case CPUINFO_INT_INPUT_STATE + 0: info->i = (nec_state->pending_irq & INT_IRQ) ? ASSERT_LINE :…
H A Dnecpriv.h29 INT_IRQ = 1, enumerator
H A Dv25priv.h42 INT_IRQ = 1, enumerator
/dports/games/libretro-mame2000/mame2000-libretro-e364a15/src/cpu/z80_drz80/
H A Ddrz80_z80.c18 #define INT_IRQ 0x01 macro
33 DRZ80.regs.Z80_IRQ=DRZ80.regs.Z80_IRQ|INT_IRQ; in Interrupt()
62 DRZ80.regs.Z80_IRQ=DRZ80.regs.Z80_IRQ&(~INT_IRQ); in drz80_irq_callback()
/dports/games/libretro-mame2003_plus/mame2003-plus-libretro-17e9889/src/cpu/z80_drz80/
H A Ddrz80_z80.c18 #define INT_IRQ 0x01 macro
33 DRZ80.regs.Z80_IRQ=DRZ80.regs.Z80_IRQ|INT_IRQ; in Interrupt()
62 DRZ80.regs.Z80_IRQ=DRZ80.regs.Z80_IRQ&(~INT_IRQ); in drz80_irq_callback()
/dports/games/libretro-mame2003/mame2003-libretro-4358db4/src/cpu/z80_drz80/
H A Ddrz80_z80.c18 #define INT_IRQ 0x01 macro
33 DRZ80.regs.Z80_IRQ=DRZ80.regs.Z80_IRQ|INT_IRQ; in Interrupt()
62 DRZ80.regs.Z80_IRQ=DRZ80.regs.Z80_IRQ&(~INT_IRQ); in drz80_irq_callback()
/dports/emulators/darcnes/darcnes/
H A Dm6502.h33 #define INT_IRQ 0x0038 /* Standard IRQ interrupt */ macro
H A Dmz80.h31 #define INT_IRQ 0x0038 /* Standard RST 38h interrupt */ macro
/dports/emulators/almostti/AlmostTI-DougMelton-Source/Z80/
H A DZ80.h34 #define INT_IRQ INT_RST38 /* Default IRQ opcode is FFh */ macro
/dports/games/libretro-fmsx/fmsx-libretro-c2c26b1/Z80/
H A DZ80.h32 #define INT_IRQ INT_RST38 /* Default IRQ opcode is FFh */ macro
/dports/emulators/xcpc/xcpc-20070122/src/dev/
H A Dz80cpu.h43 #define INT_IRQ 0x00ff /* Default IRQ opcode is 0xff */ macro

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