| /dports/emulators/unicorn/unicorn-1.0.2/qemu/target-mips/ |
| H A D | mips-defs.h | 35 #define ISA_MIPS64R5 0x00001000 macro
80 #define CPU_MIPS64R5 (CPU_MIPS64R3 | CPU_MIPS32R5 | ISA_MIPS64R5)
|
| /dports/emulators/qemu-utils/qemu-4.2.1/target/mips/ |
| H A D | mips-defs.h | 32 #define ISA_MIPS64R5 0x0000000000001000ULL macro
88 #define CPU_MIPS64R5 (CPU_MIPS64R3 | CPU_MIPS32R5 | ISA_MIPS64R5)
|
| /dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-mips/ |
| H A D | mips-defs.h | 35 #define ISA_MIPS64R5 0x00001000 macro
80 #define CPU_MIPS64R5 (CPU_MIPS64R3 | CPU_MIPS32R5 | ISA_MIPS64R5)
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/target/mips/ |
| H A D | mips-defs.h | 32 #define ISA_MIPS64R5 0x0000000000001000ULL macro
88 #define CPU_MIPS64R5 (CPU_MIPS64R3 | CPU_MIPS32R5 | ISA_MIPS64R5)
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/mips/ |
| H A D | mips-defs.h | 39 #define ISA_MIPS64R5 0x00001000 macro
85 #define CPU_MIPS64R5 (CPU_MIPS64R3 | CPU_MIPS32R5 | ISA_MIPS64R5)
|
| /dports/emulators/qemu42/qemu-4.2.1/target/mips/ |
| H A D | mips-defs.h | 32 #define ISA_MIPS64R5 0x0000000000001000ULL macro
88 #define CPU_MIPS64R5 (CPU_MIPS64R3 | CPU_MIPS32R5 | ISA_MIPS64R5)
|
| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/mips/ |
| H A D | mips-defs.h | 32 #define ISA_MIPS64R5 0x0000000000001000ULL macro
88 #define CPU_MIPS64R5 (CPU_MIPS64R3 | CPU_MIPS32R5 | ISA_MIPS64R5)
|
| /dports/emulators/qemu5/qemu-5.2.0/target/mips/ |
| H A D | mips-defs.h | 32 #define ISA_MIPS64R5 0x0000000000001000ULL macro
95 #define CPU_MIPS64R5 (CPU_MIPS64R3 | CPU_MIPS32R5 | ISA_MIPS64R5)
|
| /dports/lang/gnatdroid-binutils-x86/binutils-2.27/opcodes/ |
| H A D | mips-dis.c | 595 ISA_MIPS64R5,
641 ISA_MIPS64R5 | INSN_OCTEON3, ASE_VIRT | ASE_VIRT64,
844 || (mips_isa & INSN_ISA_MASK) == ISA_MIPS64R5 in parse_mips_dis_option()
855 || mips_isa & ISA_MIPS64R5 in parse_mips_dis_option()
|
| /dports/lang/gnatdroid-binutils/binutils-2.27/opcodes/ |
| H A D | mips-dis.c | 595 ISA_MIPS64R5,
641 ISA_MIPS64R5 | INSN_OCTEON3, ASE_VIRT | ASE_VIRT64,
844 || (mips_isa & INSN_ISA_MASK) == ISA_MIPS64R5 in parse_mips_dis_option()
855 || mips_isa & ISA_MIPS64R5 in parse_mips_dis_option()
|
| /dports/devel/arm-elf-binutils/binutils-2.37/opcodes/ |
| H A D | mips-dis.c | 620 ISA_MIPS64R5,
691 ISA_MIPS64R5 | INSN_OCTEON3, ASE_VIRT | ASE_VIRT64,
955 || (mips_isa & INSN_ISA_MASK) == ISA_MIPS64R5 in parse_mips_ase_option()
966 || mips_isa & ISA_MIPS64R5 in parse_mips_ase_option()
|
| /dports/devel/gdb/gdb-11.1/opcodes/ |
| H A D | mips-dis.c | 620 ISA_MIPS64R5,
691 ISA_MIPS64R5 | INSN_OCTEON3, ASE_VIRT | ASE_VIRT64,
955 || (mips_isa & INSN_ISA_MASK) == ISA_MIPS64R5 in parse_mips_ase_option()
966 || mips_isa & ISA_MIPS64R5 in parse_mips_ase_option()
|
| /dports/devel/gnulibiberty/binutils-2.37/opcodes/ |
| H A D | mips-dis.c | 620 ISA_MIPS64R5,
691 ISA_MIPS64R5 | INSN_OCTEON3, ASE_VIRT | ASE_VIRT64,
955 || (mips_isa & INSN_ISA_MASK) == ISA_MIPS64R5 in parse_mips_ase_option()
966 || mips_isa & ISA_MIPS64R5 in parse_mips_ase_option()
|
| /dports/devel/binutils/binutils-2.37/opcodes/ |
| H A D | mips-dis.c | 620 ISA_MIPS64R5,
691 ISA_MIPS64R5 | INSN_OCTEON3, ASE_VIRT | ASE_VIRT64,
955 || (mips_isa & INSN_ISA_MASK) == ISA_MIPS64R5 in parse_mips_ase_option()
966 || mips_isa & ISA_MIPS64R5 in parse_mips_ase_option()
|
| /dports/devel/llvm80/llvm-8.0.1.src/lib/Target/Mips/ |
| H A D | Mips64InstrInfo.td | 597 MFC3OP_FM<0x10, 3, 1>, ISA_MIPS64R5, ASE_VIRT;
599 MFC3OP_FM<0x10, 3, 3>, ISA_MIPS64R5, ASE_VIRT;
981 ISA_MIPS64R5, ASE_VIRT;
984 ISA_MIPS64R5, ASE_VIRT;
|
| /dports/devel/llvm70/llvm-7.0.1.src/lib/Target/Mips/ |
| H A D | Mips64InstrInfo.td | 590 MFC3OP_FM<0x10, 3, 1>, ISA_MIPS64R5, ASE_VIRT;
592 MFC3OP_FM<0x10, 3, 3>, ISA_MIPS64R5, ASE_VIRT;
974 ISA_MIPS64R5, ASE_VIRT;
977 ISA_MIPS64R5, ASE_VIRT;
|
| /dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/config/mips/ |
| H A D | mips.h | 262 #define ISA_MIPS64R5 (mips_isa == 68) macro
922 || ISA_MIPS64R5 \
|
| /dports/lang/gcc9/gcc-9.4.0/gcc/config/mips/ |
| H A D | mips.h | 262 #define ISA_MIPS64R5 (mips_isa == 68) macro
962 || ISA_MIPS64R5 \
|
| /dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/config/mips/ |
| H A D | mips.h | 262 #define ISA_MIPS64R5 (mips_isa == 68) macro
922 || ISA_MIPS64R5 \
|
| /dports/devel/avr-gcc/gcc-10.2.0/gcc/config/mips/ |
| H A D | mips.h | 262 #define ISA_MIPS64R5 (mips_isa == 68) macro
962 || ISA_MIPS64R5 \
|
| /dports/lang/gnat_util/gcc-6-20180516/gcc/config/mips/ |
| H A D | mips.h | 250 #define ISA_MIPS64R5 (mips_isa == 68) macro
897 || ISA_MIPS64R5 \
|
| /dports/lang/gcc11-devel/gcc-11-20211009/gcc/config/mips/ |
| H A D | mips.h | 262 #define ISA_MIPS64R5 (mips_isa == 68) macro
963 || ISA_MIPS64R5 \
|
| /dports/lang/gcc10-devel/gcc-10-20211008/gcc/config/mips/ |
| H A D | mips.h | 262 #define ISA_MIPS64R5 (mips_isa == 68) macro
962 || ISA_MIPS64R5 \
|
| /dports/lang/gcc12-devel/gcc-12-20211205/gcc/config/mips/ |
| H A D | mips.h | 279 #define ISA_MIPS64R5 (mips_isa == MIPS_ISA_MIPS64R5) macro
981 || ISA_MIPS64R5 \
|
| /dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/config/mips/ |
| H A D | mips.h | 262 #define ISA_MIPS64R5 (mips_isa == 68) macro
922 || ISA_MIPS64R5 \
|