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Searched refs:MCLK (Results 1 – 25 of 399) sorted by relevance

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/dports/devel/tinygo/tinygo-0.14.1/src/runtime/
H A Druntime_atsamd51p19.go11 sam.MCLK.APBAMASK.SetBits(sam.MCLK_APBAMASK_SERCOM0_)
20 sam.MCLK.APBAMASK.SetBits(sam.MCLK_APBAMASK_SERCOM1_)
25 sam.MCLK.APBBMASK.SetBits(sam.MCLK_APBBMASK_SERCOM2_)
30 sam.MCLK.APBBMASK.SetBits(sam.MCLK_APBBMASK_SERCOM3_)
35 sam.MCLK.APBDMASK.SetBits(sam.MCLK_APBDMASK_SERCOM4_)
40 sam.MCLK.APBDMASK.SetBits(sam.MCLK_APBDMASK_SERCOM5_)
45 sam.MCLK.APBDMASK.SetBits(sam.MCLK_APBDMASK_SERCOM6_)
50 sam.MCLK.APBDMASK.SetBits(sam.MCLK_APBDMASK_SERCOM7_)
H A Druntime_atsamd51g19.go11 sam.MCLK.APBAMASK.SetBits(sam.MCLK_APBAMASK_SERCOM0_)
20 sam.MCLK.APBAMASK.SetBits(sam.MCLK_APBAMASK_SERCOM1_)
25 sam.MCLK.APBBMASK.SetBits(sam.MCLK_APBBMASK_SERCOM2_)
30 sam.MCLK.APBBMASK.SetBits(sam.MCLK_APBBMASK_SERCOM3_)
35 sam.MCLK.APBDMASK.SetBits(sam.MCLK_APBDMASK_SERCOM4_)
40 sam.MCLK.APBDMASK.SetBits(sam.MCLK_APBDMASK_SERCOM5_)
H A Druntime_atsamd51j19.go11 sam.MCLK.APBAMASK.SetBits(sam.MCLK_APBAMASK_SERCOM0_)
20 sam.MCLK.APBAMASK.SetBits(sam.MCLK_APBAMASK_SERCOM1_)
25 sam.MCLK.APBBMASK.SetBits(sam.MCLK_APBBMASK_SERCOM2_)
30 sam.MCLK.APBBMASK.SetBits(sam.MCLK_APBBMASK_SERCOM3_)
35 sam.MCLK.APBDMASK.SetBits(sam.MCLK_APBDMASK_SERCOM4_)
40 sam.MCLK.APBDMASK.SetBits(sam.MCLK_APBDMASK_SERCOM5_)
H A Druntime_atsamd51j20.go11 sam.MCLK.APBAMASK.SetBits(sam.MCLK_APBAMASK_SERCOM0_)
20 sam.MCLK.APBAMASK.SetBits(sam.MCLK_APBAMASK_SERCOM1_)
25 sam.MCLK.APBBMASK.SetBits(sam.MCLK_APBBMASK_SERCOM2_)
30 sam.MCLK.APBBMASK.SetBits(sam.MCLK_APBBMASK_SERCOM3_)
35 sam.MCLK.APBDMASK.SetBits(sam.MCLK_APBDMASK_SERCOM4_)
40 sam.MCLK.APBDMASK.SetBits(sam.MCLK_APBDMASK_SERCOM5_)
H A Druntime_atsamd51.go167 sam.MCLK.CPUDIV.Set(sam.MCLK_CPUDIV_DIV_DIV1)
180 sam.MCLK.APBAMASK.SetBits(sam.MCLK_APBAMASK_RTC_)
315 sam.MCLK.APBBMASK.SetBits(sam.MCLK_APBBMASK_USB_)
316 sam.MCLK.AHBMASK.SetBits(sam.MCLK_AHBMASK_USB_)
326 sam.MCLK.APBDMASK.SetBits(sam.MCLK_APBDMASK_ADC0_)
327 sam.MCLK.APBDMASK.SetBits(sam.MCLK_APBDMASK_ADC1_)
/dports/devel/tinygo/tinygo-0.14.1/src/machine/
H A Dmachine_atsamd51j19.go17 sam.MCLK.APBBMASK.SetBits(sam.MCLK_APBBMASK_TCC0_ | sam.MCLK_APBBMASK_TCC1_)
18 sam.MCLK.APBCMASK.SetBits(sam.MCLK_APBCMASK_TCC2_)
19 sam.MCLK.APBDMASK.SetBits(sam.MCLK_APBDMASK_TCC4_)
H A Dmachine_atsamd51p19.go17 sam.MCLK.APBBMASK.SetBits(sam.MCLK_APBBMASK_TCC0_ | sam.MCLK_APBBMASK_TCC1_)
18 sam.MCLK.APBCMASK.SetBits(sam.MCLK_APBCMASK_TCC2_)
19 sam.MCLK.APBDMASK.SetBits(sam.MCLK_APBDMASK_TCC4_)
H A Dmachine_atsamd51j20.go17 sam.MCLK.APBBMASK.SetBits(sam.MCLK_APBBMASK_TCC0_ | sam.MCLK_APBBMASK_TCC1_)
18 sam.MCLK.APBCMASK.SetBits(sam.MCLK_APBCMASK_TCC2_)
19 sam.MCLK.APBDMASK.SetBits(sam.MCLK_APBDMASK_TCC4_)
H A Dmachine_atsamd51g19.go17 sam.MCLK.APBBMASK.SetBits(sam.MCLK_APBBMASK_TCC0_ | sam.MCLK_APBBMASK_TCC1_)
18 sam.MCLK.APBCMASK.SetBits(sam.MCLK_APBCMASK_TCC2_)
/dports/games/libretro-mame2003_plus/mame2003-plus-libretro-17e9889/src/drivers/
H A Ddrmicro.c14 #define MCLK 18432000 macro
224 { MCLK/4, MCLK/4, MCLK/4 }, /* 4.608MHz? */
242 MDRV_CPU_ADD(Z80,MCLK/6) /* 3.072MHz? */
H A Dmjsister.c11 #define MCLK 12000000 macro
40 timer_set(TIME_IN_HZ(MCLK/1024),0,dac_callback); in dac_callback()
298 MCLK/8, /* 1.500 MHz */
315 MDRV_CPU_ADD(Z80, MCLK/2) /* 6.000 MHz */
/dports/games/libretro-mame2003/mame2003-libretro-4358db4/src/drivers/
H A Ddrmicro.c14 #define MCLK 18432000 macro
224 { MCLK/4, MCLK/4, MCLK/4 }, /* 4.608MHz? */
242 MDRV_CPU_ADD(Z80,MCLK/6) /* 3.072MHz? */
H A Dmjsister.c11 #define MCLK 12000000 macro
40 timer_set(TIME_IN_HZ(MCLK/1024),0,dac_callback); in dac_callback()
298 MCLK/8, /* 1.500 MHz */
315 MDRV_CPU_ADD(Z80, MCLK/2) /* 6.000 MHz */
/dports/emulators/mess/mame-mame0226/src/mame/drivers/
H A Ddrmicro.cpp22 #define MCLK 18432000 macro
246 Z80(config, m_maincpu, MCLK/6); /* 3.072MHz? */ in drmicro()
268 SN76496(config, "sn1", MCLK/4).add_route(ALL_OUTPUTS, "mono", 0.50); in drmicro()
269 SN76496(config, "sn2", MCLK/4).add_route(ALL_OUTPUTS, "mono", 0.50); in drmicro()
270 SN76496(config, "sn3", MCLK/4).add_route(ALL_OUTPUTS, "mono", 0.50); in drmicro()
H A Dmjsister.cpp22 #define MCLK 12000000 macro
182 m_dac_timer->adjust(attotime::from_hz(MCLK) * 1024); in TIMER_CALLBACK_MEMBER()
448 Z80(config, m_maincpu, MCLK/2); /* 6.000 MHz */ in mjsister()
470 screen.set_raw(MCLK/2, 384, 0, 256, 268, 0, 240); // 6 MHz? in mjsister()
475 HD6845S(config, m_crtc, MCLK/4); // 3 MHz? in mjsister()
484 ay8910_device &aysnd(AY8910(config, "aysnd", MCLK/8)); in mjsister()
/dports/emulators/mame/mame-mame0226/src/mame/drivers/
H A Ddrmicro.cpp22 #define MCLK 18432000 macro
246 Z80(config, m_maincpu, MCLK/6); /* 3.072MHz? */ in drmicro()
268 SN76496(config, "sn1", MCLK/4).add_route(ALL_OUTPUTS, "mono", 0.50); in drmicro()
269 SN76496(config, "sn2", MCLK/4).add_route(ALL_OUTPUTS, "mono", 0.50); in drmicro()
270 SN76496(config, "sn3", MCLK/4).add_route(ALL_OUTPUTS, "mono", 0.50); in drmicro()
H A Dmjsister.cpp22 #define MCLK 12000000 macro
182 m_dac_timer->adjust(attotime::from_hz(MCLK) * 1024); in TIMER_CALLBACK_MEMBER()
448 Z80(config, m_maincpu, MCLK/2); /* 6.000 MHz */ in mjsister()
470 screen.set_raw(MCLK/2, 384, 0, 256, 268, 0, 240); // 6 MHz? in mjsister()
475 HD6845S(config, m_crtc, MCLK/4); // 3 MHz? in mjsister()
484 ay8910_device &aysnd(AY8910(config, "aysnd", MCLK/8)); in mjsister()
/dports/lang/micropython/micropython-1.17/ports/samd/
H A Dsamd_soc.c55 MCLK->APBBMASK.bit.SERCOM3_ = 1; in uart0_init()
101 MCLK->AHBMASK.bit.USB_ = 1; in usb_init()
102 MCLK->APBBMASK.bit.USB_ = 1; in usb_init()
/dports/multimedia/libv4l/linux-5.13-rc2/Documentation/devicetree/bindings/sound/
H A Dcirrus,cs42l51.yaml27 - const: MCLK
63 clock-names = "MCLK";
/dports/multimedia/v4l-utils/linux-5.13-rc2/Documentation/devicetree/bindings/sound/
H A Dcirrus,cs42l51.yaml27 - const: MCLK
63 clock-names = "MCLK";
/dports/multimedia/v4l_compat/linux-5.13-rc2/Documentation/devicetree/bindings/sound/
H A Dcirrus,cs42l51.yaml27 - const: MCLK
63 clock-names = "MCLK";
/dports/multimedia/v4l_compat/linux-5.13-rc2/sound/soc/meson/
H A Daiu-encoder-spdif.c144 ret = clk_set_rate(aiu->spdif.clks[MCLK].clk, mrate); in aiu_encoder_spdif_hw_params()
183 ret = clk_set_parent(aiu->spdif.clks[MCLK].clk, in aiu_encoder_spdif_startup()
/dports/multimedia/libv4l/linux-5.13-rc2/sound/soc/meson/
H A Daiu-encoder-spdif.c144 ret = clk_set_rate(aiu->spdif.clks[MCLK].clk, mrate); in aiu_encoder_spdif_hw_params()
183 ret = clk_set_parent(aiu->spdif.clks[MCLK].clk, in aiu_encoder_spdif_startup()
/dports/multimedia/v4l-utils/linux-5.13-rc2/sound/soc/meson/
H A Daiu-encoder-spdif.c144 ret = clk_set_rate(aiu->spdif.clks[MCLK].clk, mrate); in aiu_encoder_spdif_hw_params()
183 ret = clk_set_parent(aiu->spdif.clks[MCLK].clk, in aiu_encoder_spdif_startup()
/dports/multimedia/libv4l/linux-5.13-rc2/Documentation/sound/soc/
H A Dclocking.rst12 Every audio subsystem is driven by a master clock (sometimes referred to as MCLK
34 - BCLK = MCLK / x, or

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