| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/board/wandboard/ |
| H A D | spl.c | 319 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
321 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
323 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
324 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
331 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
332 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
335 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
340 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/board/wandboard/ |
| H A D | spl.c | 319 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
321 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
323 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
324 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
331 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
332 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
335 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
340 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/wandboard/ |
| H A D | spl.c | 319 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
321 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
323 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
324 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
331 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
332 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
335 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
340 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/board/wandboard/ |
| H A D | spl.c | 319 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
321 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
323 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
324 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
331 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
332 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
335 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
340 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
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| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/board/wandboard/ |
| H A D | spl.c | 319 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
321 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
323 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
324 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
331 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
332 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
335 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
340 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
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| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/board/wandboard/ |
| H A D | spl.c | 321 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
323 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
325 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
326 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
333 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
334 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
341 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
342 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
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| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/board/wandboard/ |
| H A D | spl.c | 321 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
323 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
325 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
326 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
333 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
334 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
341 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
342 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/board/wandboard/ |
| H A D | spl.c | 321 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
323 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
325 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
326 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
333 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
334 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
341 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
342 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
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| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/board/wandboard/ |
| H A D | spl.c | 321 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
323 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
325 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
326 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
333 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
334 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
341 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
342 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
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| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/board/wandboard/ |
| H A D | spl.c | 321 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
323 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
325 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
326 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
333 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
334 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
341 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
342 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
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| /dports/sysutils/u-boot-cubieboard2/u-boot-2021.07/board/wandboard/ |
| H A D | spl.c | 321 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
323 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
325 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
326 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
333 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
334 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
341 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
342 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
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| /dports/sysutils/u-boot-cubieboard/u-boot-2021.07/board/wandboard/ |
| H A D | spl.c | 321 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
323 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
325 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
326 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
333 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
334 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
341 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
342 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
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| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/board/wandboard/ |
| H A D | spl.c | 321 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
323 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
325 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
326 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
333 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
334 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
341 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
342 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
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| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/board/wandboard/ |
| H A D | spl.c | 321 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
323 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
325 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
326 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
333 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
334 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
341 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
342 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
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| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/board/wandboard/ |
| H A D | spl.c | 321 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
323 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
325 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
326 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
333 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
334 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
341 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
342 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
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| /dports/sysutils/u-boot-sopine/u-boot-2021.07/board/wandboard/ |
| H A D | spl.c | 321 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
323 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
325 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
326 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
333 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
334 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
341 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
342 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
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| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/board/wandboard/ |
| H A D | spl.c | 321 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
323 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
325 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
326 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
333 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
334 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
341 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
342 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
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| /dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/board/wandboard/ |
| H A D | spl.c | 321 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
323 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
325 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
326 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
333 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
334 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
341 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
342 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
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| /dports/sysutils/u-boot-nanopi-m1plus/u-boot-2021.07/board/wandboard/ |
| H A D | spl.c | 321 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
323 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
325 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
326 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
333 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
334 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
341 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
342 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
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| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/board/wandboard/ |
| H A D | spl.c | 321 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
323 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
325 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
326 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
333 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
334 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
341 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
342 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
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| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/board/wandboard/ |
| H A D | spl.c | 321 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
323 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
325 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
326 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
333 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
334 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
341 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
342 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
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| /dports/sysutils/u-boot-nanopi-neo-air/u-boot-2021.07/board/wandboard/ |
| H A D | spl.c | 321 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
323 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
325 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
326 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
333 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
334 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
341 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
342 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
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| /dports/sysutils/u-boot-chip/u-boot-2021.07/board/wandboard/ |
| H A D | spl.c | 321 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
323 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
325 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
326 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
333 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
334 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
341 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
342 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
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| /dports/sysutils/u-boot-clearfog/u-boot-2021.07/board/wandboard/ |
| H A D | spl.c | 321 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
323 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
325 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
326 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
333 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
334 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
341 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
342 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
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| /dports/sysutils/u-boot-pandaboard/u-boot-2021.07/board/wandboard/ |
| H A D | spl.c | 321 writel(0x00008000, MMDC_P0_BASE_ADDR + 0x01c); in spl_dram_init_imx6qp_lpddr3()
323 writel(0xa1390003, MMDC_P0_BASE_ADDR + 0x800); in spl_dram_init_imx6qp_lpddr3()
325 writel(0x00060004, MMDC_P0_BASE_ADDR + 0x80c); in spl_dram_init_imx6qp_lpddr3()
326 writel(0x000B0004, MMDC_P0_BASE_ADDR + 0x810); in spl_dram_init_imx6qp_lpddr3()
333 writel(0x03040314, MMDC_P0_BASE_ADDR + 0x83c); in spl_dram_init_imx6qp_lpddr3()
334 writel(0x03080300, MMDC_P0_BASE_ADDR + 0x840); in spl_dram_init_imx6qp_lpddr3()
337 writel(0x4034363A, MMDC_P0_BASE_ADDR + 0x848); in spl_dram_init_imx6qp_lpddr3()
339 writel(0x3E3E4046, MMDC_P0_BASE_ADDR + 0x850); in spl_dram_init_imx6qp_lpddr3()
341 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x81c); in spl_dram_init_imx6qp_lpddr3()
342 writel(0x33333333, MMDC_P0_BASE_ADDR + 0x820); in spl_dram_init_imx6qp_lpddr3()
[all …]
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