/dports/emulators/ppsspp-qt5/ppsspp-1.12.3/ext/armips/Archs/MIPS/ |
H A D | MipsOpcodes.cpp | 54 { "daddi", "t,s,i16", MIPS_OP(0x18), MA_MIPS3, MO_64BIT }, 58 { "daddiu", "t,s,i16", MIPS_OP(0x19), MA_MIPS3, MO_64BIT }, 94 { "sdl", "t,i16(s)", MIPS_OP(0x2C), MA_MIPS3, MO_64BIT }, 95 { "sdl", "t,(s)", MIPS_OP(0x2C), MA_MIPS3, MO_64BIT }, 268 { "dadd", "d,s,t", MIPS_SPECIAL(0x2C), MA_MIPS3, MO_64BIT }, 273 { "dmove", "d,s", MIPS_SPECIAL(0x2D), MA_MIPS3, MO_64BIT }, 275 { "dsub", "d,s,t", MIPS_SPECIAL(0x2E), MA_MIPS3, MO_64BIT }, 277 { "dneg", "d,t", MIPS_SPECIAL(0x2E), MA_MIPS3, MO_64BIT }, 281 { "dnegu", "d,t", MIPS_SPECIAL(0x2F), MA_MIPS3, MO_64BIT }, 347 { "dmfc0", "t,z", MIPS_COP0(0x01), MA_MIPS3, MO_64BIT }, [all …]
|
H A D | MipsOpcodes.h | 35 #define MO_64BIT 0x00010000 // only available on 64 bit cpus macro
|
H A D | MipsParser.cpp | 1480 if ((MipsOpcodes[z].flags & MO_64BIT) && !(arch.flags & MO_64BIT)) in parseOpcode()
|
/dports/emulators/ppsspp/ppsspp-1.12.3/ext/armips/Archs/MIPS/ |
H A D | MipsOpcodes.cpp | 54 { "daddi", "t,s,i16", MIPS_OP(0x18), MA_MIPS3, MO_64BIT }, 58 { "daddiu", "t,s,i16", MIPS_OP(0x19), MA_MIPS3, MO_64BIT }, 94 { "sdl", "t,i16(s)", MIPS_OP(0x2C), MA_MIPS3, MO_64BIT }, 95 { "sdl", "t,(s)", MIPS_OP(0x2C), MA_MIPS3, MO_64BIT }, 268 { "dadd", "d,s,t", MIPS_SPECIAL(0x2C), MA_MIPS3, MO_64BIT }, 273 { "dmove", "d,s", MIPS_SPECIAL(0x2D), MA_MIPS3, MO_64BIT }, 275 { "dsub", "d,s,t", MIPS_SPECIAL(0x2E), MA_MIPS3, MO_64BIT }, 277 { "dneg", "d,t", MIPS_SPECIAL(0x2E), MA_MIPS3, MO_64BIT }, 281 { "dnegu", "d,t", MIPS_SPECIAL(0x2F), MA_MIPS3, MO_64BIT }, 347 { "dmfc0", "t,z", MIPS_COP0(0x01), MA_MIPS3, MO_64BIT }, [all …]
|
H A D | MipsOpcodes.h | 35 #define MO_64BIT 0x00010000 // only available on 64 bit cpus macro
|
H A D | MipsParser.cpp | 1480 if ((MipsOpcodes[z].flags & MO_64BIT) && !(arch.flags & MO_64BIT)) in parseOpcode()
|
/dports/emulators/libretro-ppsspp/ppsspp-1.12.3/ext/armips/Archs/MIPS/ |
H A D | MipsOpcodes.cpp | 54 { "daddi", "t,s,i16", MIPS_OP(0x18), MA_MIPS3, MO_64BIT }, 58 { "daddiu", "t,s,i16", MIPS_OP(0x19), MA_MIPS3, MO_64BIT }, 94 { "sdl", "t,i16(s)", MIPS_OP(0x2C), MA_MIPS3, MO_64BIT }, 95 { "sdl", "t,(s)", MIPS_OP(0x2C), MA_MIPS3, MO_64BIT }, 268 { "dadd", "d,s,t", MIPS_SPECIAL(0x2C), MA_MIPS3, MO_64BIT }, 273 { "dmove", "d,s", MIPS_SPECIAL(0x2D), MA_MIPS3, MO_64BIT }, 275 { "dsub", "d,s,t", MIPS_SPECIAL(0x2E), MA_MIPS3, MO_64BIT }, 277 { "dneg", "d,t", MIPS_SPECIAL(0x2E), MA_MIPS3, MO_64BIT }, 281 { "dnegu", "d,t", MIPS_SPECIAL(0x2F), MA_MIPS3, MO_64BIT }, 347 { "dmfc0", "t,z", MIPS_COP0(0x01), MA_MIPS3, MO_64BIT }, [all …]
|
H A D | MipsOpcodes.h | 35 #define MO_64BIT 0x00010000 // only available on 64 bit cpus macro
|
H A D | MipsParser.cpp | 1480 if ((MipsOpcodes[z].flags & MO_64BIT) && !(arch.flags & MO_64BIT)) in parseOpcode()
|