Searched refs:MO_RSP_HWOFFSET (Results 1 – 9 of 9) sorted by relevance
/dports/emulators/ppsspp-qt5/ppsspp-1.12.3/ext/armips/Archs/MIPS/ |
H A D | CMipsInstruction.cpp | 140 …} else if (opcodeData.opcode.flags & (MO_RSP_HWOFFSET | MO_RSP_WOFFSET | MO_RSP_DWOFFSET | MO_RSP_… in Validate() 144 if (opcodeData.opcode.flags & MO_RSP_HWOFFSET) shift = 1; in Validate()
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H A D | MipsOpcodes.h | 43 #define MO_RSP_HWOFFSET 0x01000000 // RSP halfword load/store offset macro
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H A D | MipsOpcodes.cpp | 972 {"lsv", "RtRo,i7(s)", MIPS_RSP_LWC2(0x01), MA_RSP, MO_RSP_HWOFFSET }, 973 {"lsv", "RtRo,(s)", MIPS_RSP_LWC2(0x01), MA_RSP, MO_RSP_HWOFFSET }, 1006 {"ssv", "RtRo,i7(s)", MIPS_RSP_SWC2(0x01), MA_RSP, MO_RSP_HWOFFSET }, 1007 {"ssv", "RtRo,(s)", MIPS_RSP_SWC2(0x01), MA_RSP, MO_RSP_HWOFFSET },
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/dports/emulators/ppsspp/ppsspp-1.12.3/ext/armips/Archs/MIPS/ |
H A D | CMipsInstruction.cpp | 140 …} else if (opcodeData.opcode.flags & (MO_RSP_HWOFFSET | MO_RSP_WOFFSET | MO_RSP_DWOFFSET | MO_RSP_… in Validate() 144 if (opcodeData.opcode.flags & MO_RSP_HWOFFSET) shift = 1; in Validate()
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H A D | MipsOpcodes.h | 43 #define MO_RSP_HWOFFSET 0x01000000 // RSP halfword load/store offset macro
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H A D | MipsOpcodes.cpp | 972 {"lsv", "RtRo,i7(s)", MIPS_RSP_LWC2(0x01), MA_RSP, MO_RSP_HWOFFSET }, 973 {"lsv", "RtRo,(s)", MIPS_RSP_LWC2(0x01), MA_RSP, MO_RSP_HWOFFSET }, 1006 {"ssv", "RtRo,i7(s)", MIPS_RSP_SWC2(0x01), MA_RSP, MO_RSP_HWOFFSET }, 1007 {"ssv", "RtRo,(s)", MIPS_RSP_SWC2(0x01), MA_RSP, MO_RSP_HWOFFSET },
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/dports/emulators/libretro-ppsspp/ppsspp-1.12.3/ext/armips/Archs/MIPS/ |
H A D | CMipsInstruction.cpp | 140 …} else if (opcodeData.opcode.flags & (MO_RSP_HWOFFSET | MO_RSP_WOFFSET | MO_RSP_DWOFFSET | MO_RSP_… in Validate() 144 if (opcodeData.opcode.flags & MO_RSP_HWOFFSET) shift = 1; in Validate()
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H A D | MipsOpcodes.h | 43 #define MO_RSP_HWOFFSET 0x01000000 // RSP halfword load/store offset macro
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H A D | MipsOpcodes.cpp | 972 {"lsv", "RtRo,i7(s)", MIPS_RSP_LWC2(0x01), MA_RSP, MO_RSP_HWOFFSET }, 973 {"lsv", "RtRo,(s)", MIPS_RSP_LWC2(0x01), MA_RSP, MO_RSP_HWOFFSET }, 1006 {"ssv", "RtRo,i7(s)", MIPS_RSP_SWC2(0x01), MA_RSP, MO_RSP_HWOFFSET }, 1007 {"ssv", "RtRo,(s)", MIPS_RSP_SWC2(0x01), MA_RSP, MO_RSP_HWOFFSET },
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