Searched refs:MO_RSP_WOFFSET (Results 1 – 9 of 9) sorted by relevance
/dports/emulators/ppsspp-qt5/ppsspp-1.12.3/ext/armips/Archs/MIPS/ |
H A D | CMipsInstruction.cpp | 140 …} else if (opcodeData.opcode.flags & (MO_RSP_HWOFFSET | MO_RSP_WOFFSET | MO_RSP_DWOFFSET | MO_RSP_… in Validate() 145 else if (opcodeData.opcode.flags & MO_RSP_WOFFSET) shift = 2; in Validate()
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H A D | MipsOpcodes.h | 44 #define MO_RSP_WOFFSET 0x02000000 // RSP word load/store offset macro
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H A D | MipsOpcodes.cpp | 974 {"llv", "RtRo,i7(s)", MIPS_RSP_LWC2(0x02), MA_RSP, MO_RSP_WOFFSET }, 975 {"llv", "RtRo,(s)", MIPS_RSP_LWC2(0x02), MA_RSP, MO_RSP_WOFFSET }, 1008 {"slv", "RtRo,i7(s)", MIPS_RSP_SWC2(0x02), MA_RSP, MO_RSP_WOFFSET }, 1009 {"slv", "RtRo,(s)", MIPS_RSP_SWC2(0x02), MA_RSP, MO_RSP_WOFFSET },
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/dports/emulators/ppsspp/ppsspp-1.12.3/ext/armips/Archs/MIPS/ |
H A D | CMipsInstruction.cpp | 140 …} else if (opcodeData.opcode.flags & (MO_RSP_HWOFFSET | MO_RSP_WOFFSET | MO_RSP_DWOFFSET | MO_RSP_… in Validate() 145 else if (opcodeData.opcode.flags & MO_RSP_WOFFSET) shift = 2; in Validate()
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H A D | MipsOpcodes.h | 44 #define MO_RSP_WOFFSET 0x02000000 // RSP word load/store offset macro
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H A D | MipsOpcodes.cpp | 974 {"llv", "RtRo,i7(s)", MIPS_RSP_LWC2(0x02), MA_RSP, MO_RSP_WOFFSET }, 975 {"llv", "RtRo,(s)", MIPS_RSP_LWC2(0x02), MA_RSP, MO_RSP_WOFFSET }, 1008 {"slv", "RtRo,i7(s)", MIPS_RSP_SWC2(0x02), MA_RSP, MO_RSP_WOFFSET }, 1009 {"slv", "RtRo,(s)", MIPS_RSP_SWC2(0x02), MA_RSP, MO_RSP_WOFFSET },
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/dports/emulators/libretro-ppsspp/ppsspp-1.12.3/ext/armips/Archs/MIPS/ |
H A D | CMipsInstruction.cpp | 140 …} else if (opcodeData.opcode.flags & (MO_RSP_HWOFFSET | MO_RSP_WOFFSET | MO_RSP_DWOFFSET | MO_RSP_… in Validate() 145 else if (opcodeData.opcode.flags & MO_RSP_WOFFSET) shift = 2; in Validate()
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H A D | MipsOpcodes.h | 44 #define MO_RSP_WOFFSET 0x02000000 // RSP word load/store offset macro
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H A D | MipsOpcodes.cpp | 974 {"llv", "RtRo,i7(s)", MIPS_RSP_LWC2(0x02), MA_RSP, MO_RSP_WOFFSET }, 975 {"llv", "RtRo,(s)", MIPS_RSP_LWC2(0x02), MA_RSP, MO_RSP_WOFFSET }, 1008 {"slv", "RtRo,i7(s)", MIPS_RSP_SWC2(0x02), MA_RSP, MO_RSP_WOFFSET }, 1009 {"slv", "RtRo,(s)", MIPS_RSP_SWC2(0x02), MA_RSP, MO_RSP_WOFFSET },
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