Home
last modified time | relevance | path

Searched refs:MSR_IA32_MISC_ENABLE_DEFAULT (Results 1 – 25 of 31) sorted by relevance

12

/dports/emulators/unicorn/unicorn-1.0.2/qemu/target-i386/
H A Dcpu.h335 #define MSR_IA32_MISC_ENABLE_DEFAULT 1 macro
H A Dcpu.c2270 env->msr_ia32_misc_enable = MSR_IA32_MISC_ENABLE_DEFAULT; in x86_cpu_reset()
/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-i386/
H A Dcpu.h335 #define MSR_IA32_MISC_ENABLE_DEFAULT 1 macro
H A Dcpu.c2270 env->msr_ia32_misc_enable = MSR_IA32_MISC_ENABLE_DEFAULT; in x86_cpu_reset()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/i386/
H A Dmachine.c441 return env->msr_ia32_misc_enable != MSR_IA32_MISC_ENABLE_DEFAULT; in misc_enable_needed()
H A Dcpu.h389 #define MSR_IA32_MISC_ENABLE_DEFAULT 1 macro
H A Dcpu.c4476 env->msr_ia32_misc_enable = MSR_IA32_MISC_ENABLE_DEFAULT; in x86_cpu_reset()
/dports/emulators/qemu-utils/qemu-4.2.1/target/i386/
H A Dmachine.c575 return env->msr_ia32_misc_enable != MSR_IA32_MISC_ENABLE_DEFAULT; in misc_enable_needed()
H A Dcpu.h387 #define MSR_IA32_MISC_ENABLE_DEFAULT 1 macro
H A Dcpu.c5825 env->msr_ia32_misc_enable = MSR_IA32_MISC_ENABLE_DEFAULT; in x86_cpu_reset()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/i386/
H A Dmachine.c575 return env->msr_ia32_misc_enable != MSR_IA32_MISC_ENABLE_DEFAULT; in misc_enable_needed()
H A Dcpu.h388 #define MSR_IA32_MISC_ENABLE_DEFAULT 1 macro
/dports/emulators/qemu42/qemu-4.2.1/target/i386/
H A Dmachine.c575 return env->msr_ia32_misc_enable != MSR_IA32_MISC_ENABLE_DEFAULT; in misc_enable_needed()
H A Dcpu.h387 #define MSR_IA32_MISC_ENABLE_DEFAULT 1 macro
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/i386/
H A Dmachine.c575 return env->msr_ia32_misc_enable != MSR_IA32_MISC_ENABLE_DEFAULT; in misc_enable_needed()
H A Dcpu.h388 #define MSR_IA32_MISC_ENABLE_DEFAULT 1 macro
/dports/emulators/qemu5/qemu-5.2.0/target/i386/
H A Dmachine.c593 return env->msr_ia32_misc_enable != MSR_IA32_MISC_ENABLE_DEFAULT; in misc_enable_needed()
H A Dcpu.h392 #define MSR_IA32_MISC_ENABLE_DEFAULT 1 macro
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/i386/
H A Dmachine.c593 return env->msr_ia32_misc_enable != MSR_IA32_MISC_ENABLE_DEFAULT;
H A Dcpu.h420 #define MSR_IA32_MISC_ENABLE_DEFAULT 1
H A Dcpu.c5710 env->msr_ia32_misc_enable = MSR_IA32_MISC_ENABLE_DEFAULT;
/dports/emulators/qemu/qemu-6.2.0/target/i386/
H A Dmachine.c593 return env->msr_ia32_misc_enable != MSR_IA32_MISC_ENABLE_DEFAULT; in misc_enable_needed()
H A Dcpu.h428 #define MSR_IA32_MISC_ENABLE_DEFAULT 1 macro
/dports/emulators/qemu60/qemu-6.0.0/target/i386/
H A Dmachine.c593 return env->msr_ia32_misc_enable != MSR_IA32_MISC_ENABLE_DEFAULT; in misc_enable_needed()
H A Dcpu.h391 #define MSR_IA32_MISC_ENABLE_DEFAULT 1 macro

12