/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 1253 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitAddSub() local 1257 std::swap(MulLHS, MulRHS); in emitAddSub() 1259 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitAddSub() 1260 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitAddSub() 1639 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitLogicalOp() local 1643 std::swap(MulLHS, MulRHS); in emitLogicalOp() 1645 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitLogicalOp() 1646 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitLogicalOp()
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/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 1253 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitAddSub() local 1257 std::swap(MulLHS, MulRHS); in emitAddSub() 1259 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitAddSub() 1260 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitAddSub() 1639 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitLogicalOp() local 1643 std::swap(MulLHS, MulRHS); in emitLogicalOp() 1645 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitLogicalOp() 1646 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitLogicalOp()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 1227 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitAddSub() local 1231 std::swap(MulLHS, MulRHS); in emitAddSub() 1233 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitAddSub() 1234 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitAddSub() 1596 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitLogicalOp() local 1600 std::swap(MulLHS, MulRHS); in emitLogicalOp() 1602 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitLogicalOp() 1603 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitLogicalOp()
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 1227 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitAddSub() local 1231 std::swap(MulLHS, MulRHS); in emitAddSub() 1233 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitAddSub() 1234 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitAddSub() 1596 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitLogicalOp() local 1600 std::swap(MulLHS, MulRHS); in emitLogicalOp() 1602 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitLogicalOp() 1603 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitLogicalOp()
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 1253 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitAddSub() local 1257 std::swap(MulLHS, MulRHS); in emitAddSub() 1259 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitAddSub() 1260 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitAddSub() 1639 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitLogicalOp() local 1643 std::swap(MulLHS, MulRHS); in emitLogicalOp() 1645 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitLogicalOp() 1646 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitLogicalOp()
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/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 1253 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitAddSub() local 1257 std::swap(MulLHS, MulRHS); in emitAddSub() 1259 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitAddSub() 1260 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitAddSub() 1639 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitLogicalOp() local 1643 std::swap(MulLHS, MulRHS); in emitLogicalOp() 1645 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitLogicalOp() 1646 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitLogicalOp()
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/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 1255 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitAddSub() local 1259 std::swap(MulLHS, MulRHS); in emitAddSub() 1261 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitAddSub() 1262 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitAddSub() 1641 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitLogicalOp() local 1645 std::swap(MulLHS, MulRHS); in emitLogicalOp() 1647 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitLogicalOp() 1648 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitLogicalOp()
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 1227 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitAddSub() local 1231 std::swap(MulLHS, MulRHS); in emitAddSub() 1233 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitAddSub() 1234 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitAddSub() 1596 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitLogicalOp() local 1600 std::swap(MulLHS, MulRHS); in emitLogicalOp() 1602 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitLogicalOp() 1603 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitLogicalOp()
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 1255 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitAddSub() local 1259 std::swap(MulLHS, MulRHS); in emitAddSub() 1261 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitAddSub() 1262 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitAddSub() 1641 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitLogicalOp() local 1645 std::swap(MulLHS, MulRHS); in emitLogicalOp() 1647 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitLogicalOp() 1648 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitLogicalOp()
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 1227 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitAddSub() local 1231 std::swap(MulLHS, MulRHS); in emitAddSub() 1233 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitAddSub() 1234 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitAddSub() 1596 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitLogicalOp() local 1600 std::swap(MulLHS, MulRHS); in emitLogicalOp() 1602 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitLogicalOp() 1603 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitLogicalOp()
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 1227 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitAddSub() local 1231 std::swap(MulLHS, MulRHS); in emitAddSub() 1233 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitAddSub() 1234 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitAddSub() 1596 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitLogicalOp() local 1600 std::swap(MulLHS, MulRHS); in emitLogicalOp() 1602 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitLogicalOp() 1603 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitLogicalOp()
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/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 1255 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitAddSub() local 1259 std::swap(MulLHS, MulRHS); in emitAddSub() 1261 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitAddSub() 1262 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitAddSub() 1641 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitLogicalOp() local 1645 std::swap(MulLHS, MulRHS); in emitLogicalOp() 1647 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitLogicalOp() 1648 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitLogicalOp()
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 1253 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitAddSub() local 1257 std::swap(MulLHS, MulRHS); in emitAddSub() 1259 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitAddSub() 1260 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitAddSub() 1639 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitLogicalOp() local 1643 std::swap(MulLHS, MulRHS); in emitLogicalOp() 1645 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitLogicalOp() 1646 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitLogicalOp()
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/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 1218 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitAddSub() local 1222 std::swap(MulLHS, MulRHS); in emitAddSub() 1224 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitAddSub() 1225 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitAddSub() 1604 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitLogicalOp() local 1608 std::swap(MulLHS, MulRHS); in emitLogicalOp() 1610 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitLogicalOp() 1611 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitLogicalOp()
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/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 1222 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitAddSub() local 1226 std::swap(MulLHS, MulRHS); in emitAddSub() 1228 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitAddSub() 1229 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitAddSub() 1608 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitLogicalOp() local 1612 std::swap(MulLHS, MulRHS); in emitLogicalOp() 1614 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitLogicalOp() 1615 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitLogicalOp()
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/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 1222 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitAddSub() local 1226 std::swap(MulLHS, MulRHS); in emitAddSub() 1228 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitAddSub() 1229 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitAddSub() 1608 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitLogicalOp() local 1612 std::swap(MulLHS, MulRHS); in emitLogicalOp() 1614 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitLogicalOp() 1615 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitLogicalOp()
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 1227 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitAddSub() local 1231 std::swap(MulLHS, MulRHS); in emitAddSub() 1233 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitAddSub() 1234 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitAddSub() 1596 const Value *MulRHS = cast<MulOperator>(RHS)->getOperand(1); in emitLogicalOp() local 1600 std::swap(MulLHS, MulRHS); in emitLogicalOp() 1602 assert(isa<ConstantInt>(MulRHS) && "Expected a ConstantInt."); in emitLogicalOp() 1603 uint64_t ShiftVal = cast<ConstantInt>(MulRHS)->getValue().logBase2(); in emitLogicalOp()
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/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 7367 SDValue MulRHS = LHS.getOperand(1); 7372 numBitsUnsigned(MulRHS, DAG) <= 32) { 7374 MulRHS = DAG.getZExtOrTrunc(MulRHS, SL, MVT::i32); 7376 return getMad64_32(DAG, SL, VT, MulLHS, MulRHS, AddRHS, false); 7379 if (numBitsSigned(MulLHS, DAG) < 32 && numBitsSigned(MulRHS, DAG) < 32) { 7381 MulRHS = DAG.getSExtOrTrunc(MulRHS, SL, MVT::i32); 7383 return getMad64_32(DAG, SL, VT, MulLHS, MulRHS, AddRHS, true);
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/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 8447 SDValue MulRHS = LHS.getOperand(1); in performAddCombine() local 8452 numBitsUnsigned(MulRHS, DAG) <= 32) { in performAddCombine() 8454 MulRHS = DAG.getZExtOrTrunc(MulRHS, SL, MVT::i32); in performAddCombine() 8456 return getMad64_32(DAG, SL, VT, MulLHS, MulRHS, AddRHS, false); in performAddCombine() 8459 if (numBitsSigned(MulLHS, DAG) < 32 && numBitsSigned(MulRHS, DAG) < 32) { in performAddCombine() 8461 MulRHS = DAG.getSExtOrTrunc(MulRHS, SL, MVT::i32); in performAddCombine() 8463 return getMad64_32(DAG, SL, VT, MulLHS, MulRHS, AddRHS, true); in performAddCombine()
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/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 9308 SDValue MulRHS = LHS.getOperand(1); in performAddCombine() local 9313 numBitsUnsigned(MulRHS, DAG) <= 32) { in performAddCombine() 9315 MulRHS = DAG.getZExtOrTrunc(MulRHS, SL, MVT::i32); in performAddCombine() 9317 return getMad64_32(DAG, SL, VT, MulLHS, MulRHS, AddRHS, false); in performAddCombine() 9320 if (numBitsSigned(MulLHS, DAG) < 32 && numBitsSigned(MulRHS, DAG) < 32) { in performAddCombine() 9322 MulRHS = DAG.getSExtOrTrunc(MulRHS, SL, MVT::i32); in performAddCombine() 9324 return getMad64_32(DAG, SL, VT, MulLHS, MulRHS, AddRHS, true); in performAddCombine()
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Transforms/Scalar/ |
H A D | LoopStrengthReduce.cpp | 748 if (const SCEVMulExpr *MulRHS = dyn_cast<SCEVMulExpr>(RHS)) { in getExactSDiv() local 749 if (IgnoreSignificantBits || isMulSExtable(MulRHS, SE)) { in getExactSDiv() 752 dyn_cast<SCEVConstant>(MulRHS->getOperand(0)); in getExactSDiv() 755 SmallVector<const SCEV *, 4> ROps(drop_begin(MulRHS->operands())); in getExactSDiv()
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Transforms/Scalar/ |
H A D | LoopStrengthReduce.cpp | 748 if (const SCEVMulExpr *MulRHS = dyn_cast<SCEVMulExpr>(RHS)) { in getExactSDiv() local 749 if (IgnoreSignificantBits || isMulSExtable(MulRHS, SE)) { in getExactSDiv() 752 dyn_cast<SCEVConstant>(MulRHS->getOperand(0)); in getExactSDiv() 755 SmallVector<const SCEV *, 4> ROps(drop_begin(MulRHS->operands())); in getExactSDiv()
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/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | LoopStrengthReduce.cpp | 748 if (const SCEVMulExpr *MulRHS = dyn_cast<SCEVMulExpr>(RHS)) { in getExactSDiv() local 749 if (IgnoreSignificantBits || isMulSExtable(MulRHS, SE)) { in getExactSDiv() 752 dyn_cast<SCEVConstant>(MulRHS->getOperand(0)); in getExactSDiv() 755 SmallVector<const SCEV *, 4> ROps(drop_begin(MulRHS->operands())); in getExactSDiv()
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Transforms/Scalar/ |
H A D | LoopStrengthReduce.cpp | 754 if (const SCEVMulExpr *MulRHS = dyn_cast<SCEVMulExpr>(RHS)) { in getExactSDiv() local 755 if (IgnoreSignificantBits || isMulSExtable(MulRHS, SE)) { in getExactSDiv() 758 dyn_cast<SCEVConstant>(MulRHS->getOperand(0)); in getExactSDiv() 761 SmallVector<const SCEV *, 4> ROps(drop_begin(MulRHS->operands())); in getExactSDiv()
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Transforms/Scalar/ |
H A D | LoopStrengthReduce.cpp | 748 if (const SCEVMulExpr *MulRHS = dyn_cast<SCEVMulExpr>(RHS)) { in getExactSDiv() local 749 if (IgnoreSignificantBits || isMulSExtable(MulRHS, SE)) { in getExactSDiv() 752 dyn_cast<SCEVConstant>(MulRHS->getOperand(0)); in getExactSDiv() 755 SmallVector<const SCEV *, 4> ROps(drop_begin(MulRHS->operands())); in getExactSDiv()
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