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Searched refs:NX_NTL_CONTROL (Results 1 – 14 of 14) sorted by relevance

/dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/hw/
H A Dnpu-hw-procedures.c138 xscom_read(npu_dev->npu->chip_id, npu_dev->xscom + NX_NTL_CONTROL, &val); in reset_npu_dl()
140 xscom_write(npu_dev->npu->chip_id, npu_dev->xscom + NX_NTL_CONTROL, val); in reset_npu_dl()
150 xscom_write(npu_dev->npu->chip_id, npu_dev->xscom + NX_NTL_CONTROL, val); in reset_npu_dl()
/dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/hw/
H A Dnpu-hw-procedures.c138 xscom_read(npu_dev->npu->chip_id, npu_dev->xscom + NX_NTL_CONTROL, &val); in reset_npu_dl()
140 xscom_write(npu_dev->npu->chip_id, npu_dev->xscom + NX_NTL_CONTROL, val); in reset_npu_dl()
150 xscom_write(npu_dev->npu->chip_id, npu_dev->xscom + NX_NTL_CONTROL, val); in reset_npu_dl()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/skiboot/hw/
H A Dnpu-hw-procedures.c138 xscom_read(npu_dev->npu->chip_id, npu_dev->xscom + NX_NTL_CONTROL, &val); in reset_npu_dl()
140 xscom_write(npu_dev->npu->chip_id, npu_dev->xscom + NX_NTL_CONTROL, val); in reset_npu_dl()
150 xscom_write(npu_dev->npu->chip_id, npu_dev->xscom + NX_NTL_CONTROL, val); in reset_npu_dl()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/hw/
H A Dnpu-hw-procedures.c138 xscom_read(npu_dev->npu->chip_id, npu_dev->xscom + NX_NTL_CONTROL, &val); in reset_npu_dl()
140 xscom_write(npu_dev->npu->chip_id, npu_dev->xscom + NX_NTL_CONTROL, val); in reset_npu_dl()
150 xscom_write(npu_dev->npu->chip_id, npu_dev->xscom + NX_NTL_CONTROL, val); in reset_npu_dl()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/skiboot/hw/
H A Dnpu-hw-procedures.c138 xscom_read(npu_dev->npu->chip_id, npu_dev->xscom + NX_NTL_CONTROL, &val);
140 xscom_write(npu_dev->npu->chip_id, npu_dev->xscom + NX_NTL_CONTROL, val);
150 xscom_write(npu_dev->npu->chip_id, npu_dev->xscom + NX_NTL_CONTROL, val);
/dports/emulators/qemu/qemu-6.2.0/roms/skiboot/hw/
H A Dnpu-hw-procedures.c130 xscom_read(npu_dev->npu->chip_id, npu_dev->xscom + NX_NTL_CONTROL, &val); in reset_npu_dl()
132 xscom_write(npu_dev->npu->chip_id, npu_dev->xscom + NX_NTL_CONTROL, val); in reset_npu_dl()
142 xscom_write(npu_dev->npu->chip_id, npu_dev->xscom + NX_NTL_CONTROL, val); in reset_npu_dl()
/dports/emulators/qemu60/qemu-6.0.0/roms/skiboot/hw/
H A Dnpu-hw-procedures.c138 xscom_read(npu_dev->npu->chip_id, npu_dev->xscom + NX_NTL_CONTROL, &val); in reset_npu_dl()
140 xscom_write(npu_dev->npu->chip_id, npu_dev->xscom + NX_NTL_CONTROL, val); in reset_npu_dl()
150 xscom_write(npu_dev->npu->chip_id, npu_dev->xscom + NX_NTL_CONTROL, val); in reset_npu_dl()
/dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/include/
H A Dnpu-regs.h64 #define NX_NTL_CONTROL 0x26 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/include/
H A Dnpu-regs.h64 #define NX_NTL_CONTROL 0x26 macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/skiboot/include/
H A Dnpu-regs.h64 #define NX_NTL_CONTROL 0x26 macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/include/
H A Dnpu-regs.h64 #define NX_NTL_CONTROL 0x26 macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/skiboot/include/
H A Dnpu-regs.h64 #define NX_NTL_CONTROL 0x26 macro
/dports/emulators/qemu/qemu-6.2.0/roms/skiboot/include/
H A Dnpu-regs.h51 #define NX_NTL_CONTROL 0x26 macro
/dports/emulators/qemu60/qemu-6.0.0/roms/skiboot/include/
H A Dnpu-regs.h64 #define NX_NTL_CONTROL 0x26 macro