Home
last modified time | relevance | path

Searched refs:NewVReg5 (Results 1 – 17 of 17) sorted by relevance

/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/ARM/
H A DARMISelLowering.cpp8260 unsigned NewVReg5 = MRI->createVirtualRegister(TRC);
8261 BuildMI(*MBB, MI, dl, TII->get(ARM::tADDframe), NewVReg5)
8266 .addReg(NewVReg5, RegState::Kill)
8520 unsigned NewVReg5 = MRI->createVirtualRegister(TRC);
8521 BuildMI(DispContBB, dl, TII->get(ARM::tLDRi), NewVReg5)
8527 unsigned NewVReg6 = NewVReg5;
8532 .addReg(NewVReg5, RegState::Kill)
8613 unsigned NewVReg5 = MRI->createVirtualRegister(TRC);
8614 BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg5)
8623 .addReg(NewVReg5, RegState::Kill)
[all …]
/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/ARM/
H A DARMISelLowering.cpp8322 unsigned NewVReg5 = MRI->createVirtualRegister(TRC);
8323 BuildMI(*MBB, MI, dl, TII->get(ARM::tADDframe), NewVReg5)
8328 .addReg(NewVReg5, RegState::Kill)
8582 unsigned NewVReg5 = MRI->createVirtualRegister(TRC);
8583 BuildMI(DispContBB, dl, TII->get(ARM::tLDRi), NewVReg5)
8589 unsigned NewVReg6 = NewVReg5;
8594 .addReg(NewVReg5, RegState::Kill)
8675 unsigned NewVReg5 = MRI->createVirtualRegister(TRC);
8676 BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg5)
8685 .addReg(NewVReg5, RegState::Kill)
[all …]
/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/ARM/
H A DARMISelLowering.cpp8654 unsigned NewVReg5 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj() local
8655 BuildMI(*MBB, MI, dl, TII->get(ARM::tADDframe), NewVReg5) in SetupEntryBlockForSjLj()
8660 .addReg(NewVReg5, RegState::Kill) in SetupEntryBlockForSjLj()
8914 unsigned NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
8915 BuildMI(DispContBB, dl, TII->get(ARM::tLDRi), NewVReg5) in EmitSjLjDispatchBlock()
8921 unsigned NewVReg6 = NewVReg5; in EmitSjLjDispatchBlock()
8926 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
9007 unsigned NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
9008 BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg5) in EmitSjLjDispatchBlock()
9017 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
[all …]
/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/ARM/
H A DARMISelLowering.cpp9574 Register NewVReg5 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj() local
9575 BuildMI(*MBB, MI, dl, TII->get(ARM::tADDframe), NewVReg5) in SetupEntryBlockForSjLj()
9580 .addReg(NewVReg5, RegState::Kill) in SetupEntryBlockForSjLj()
9834 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
9835 BuildMI(DispContBB, dl, TII->get(ARM::tLDRi), NewVReg5) in EmitSjLjDispatchBlock()
9841 unsigned NewVReg6 = NewVReg5; in EmitSjLjDispatchBlock()
9846 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
9927 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
9928 BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg5) in EmitSjLjDispatchBlock()
9937 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp9574 Register NewVReg5 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj() local
9575 BuildMI(*MBB, MI, dl, TII->get(ARM::tADDframe), NewVReg5) in SetupEntryBlockForSjLj()
9580 .addReg(NewVReg5, RegState::Kill) in SetupEntryBlockForSjLj()
9834 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
9835 BuildMI(DispContBB, dl, TII->get(ARM::tLDRi), NewVReg5) in EmitSjLjDispatchBlock()
9841 unsigned NewVReg6 = NewVReg5; in EmitSjLjDispatchBlock()
9846 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
9927 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
9928 BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg5) in EmitSjLjDispatchBlock()
9937 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp9574 Register NewVReg5 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj() local
9575 BuildMI(*MBB, MI, dl, TII->get(ARM::tADDframe), NewVReg5) in SetupEntryBlockForSjLj()
9580 .addReg(NewVReg5, RegState::Kill) in SetupEntryBlockForSjLj()
9834 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
9835 BuildMI(DispContBB, dl, TII->get(ARM::tLDRi), NewVReg5) in EmitSjLjDispatchBlock()
9841 unsigned NewVReg6 = NewVReg5; in EmitSjLjDispatchBlock()
9846 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
9927 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
9928 BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg5) in EmitSjLjDispatchBlock()
9937 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp10013 Register NewVReg5 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj() local
10014 BuildMI(*MBB, MI, dl, TII->get(ARM::tADDframe), NewVReg5) in SetupEntryBlockForSjLj()
10019 .addReg(NewVReg5, RegState::Kill) in SetupEntryBlockForSjLj()
10272 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10273 BuildMI(DispContBB, dl, TII->get(ARM::tLDRi), NewVReg5) in EmitSjLjDispatchBlock()
10279 unsigned NewVReg6 = NewVReg5; in EmitSjLjDispatchBlock()
10284 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
10364 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10365 BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg5) in EmitSjLjDispatchBlock()
10374 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp10012 Register NewVReg5 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj() local
10013 BuildMI(*MBB, MI, dl, TII->get(ARM::tADDframe), NewVReg5) in SetupEntryBlockForSjLj()
10018 .addReg(NewVReg5, RegState::Kill) in SetupEntryBlockForSjLj()
10271 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10272 BuildMI(DispContBB, dl, TII->get(ARM::tLDRi), NewVReg5) in EmitSjLjDispatchBlock()
10278 unsigned NewVReg6 = NewVReg5; in EmitSjLjDispatchBlock()
10283 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
10363 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10364 BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg5) in EmitSjLjDispatchBlock()
10373 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp10019 Register NewVReg5 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj() local
10020 BuildMI(*MBB, MI, dl, TII->get(ARM::tADDframe), NewVReg5) in SetupEntryBlockForSjLj()
10025 .addReg(NewVReg5, RegState::Kill) in SetupEntryBlockForSjLj()
10278 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10279 BuildMI(DispContBB, dl, TII->get(ARM::tLDRi), NewVReg5) in EmitSjLjDispatchBlock()
10285 unsigned NewVReg6 = NewVReg5; in EmitSjLjDispatchBlock()
10290 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
10370 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10371 BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg5) in EmitSjLjDispatchBlock()
10380 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/ARM/
H A DARMISelLowering.cpp10015 Register NewVReg5 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj() local
10016 BuildMI(*MBB, MI, dl, TII->get(ARM::tADDframe), NewVReg5) in SetupEntryBlockForSjLj()
10021 .addReg(NewVReg5, RegState::Kill) in SetupEntryBlockForSjLj()
10274 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10275 BuildMI(DispContBB, dl, TII->get(ARM::tLDRi), NewVReg5) in EmitSjLjDispatchBlock()
10281 unsigned NewVReg6 = NewVReg5; in EmitSjLjDispatchBlock()
10286 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
10366 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10367 BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg5) in EmitSjLjDispatchBlock()
10376 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp10019 Register NewVReg5 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj() local
10020 BuildMI(*MBB, MI, dl, TII->get(ARM::tADDframe), NewVReg5) in SetupEntryBlockForSjLj()
10025 .addReg(NewVReg5, RegState::Kill) in SetupEntryBlockForSjLj()
10278 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10279 BuildMI(DispContBB, dl, TII->get(ARM::tLDRi), NewVReg5) in EmitSjLjDispatchBlock()
10285 unsigned NewVReg6 = NewVReg5; in EmitSjLjDispatchBlock()
10290 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
10370 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10371 BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg5) in EmitSjLjDispatchBlock()
10380 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp10433 Register NewVReg5 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj() local
10434 BuildMI(*MBB, MI, dl, TII->get(ARM::tADDframe), NewVReg5) in SetupEntryBlockForSjLj()
10439 .addReg(NewVReg5, RegState::Kill) in SetupEntryBlockForSjLj()
10692 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10693 BuildMI(DispContBB, dl, TII->get(ARM::tLDRi), NewVReg5) in EmitSjLjDispatchBlock()
10699 unsigned NewVReg6 = NewVReg5; in EmitSjLjDispatchBlock()
10704 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
10784 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10785 BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg5) in EmitSjLjDispatchBlock()
10794 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/Target/ARM/
H A DARMISelLowering.cpp10433 Register NewVReg5 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj() local
10434 BuildMI(*MBB, MI, dl, TII->get(ARM::tADDframe), NewVReg5) in SetupEntryBlockForSjLj()
10439 .addReg(NewVReg5, RegState::Kill) in SetupEntryBlockForSjLj()
10692 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10693 BuildMI(DispContBB, dl, TII->get(ARM::tLDRi), NewVReg5) in EmitSjLjDispatchBlock()
10699 unsigned NewVReg6 = NewVReg5; in EmitSjLjDispatchBlock()
10704 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
10784 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10785 BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg5) in EmitSjLjDispatchBlock()
10794 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
[all …]
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp10433 Register NewVReg5 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj() local
10434 BuildMI(*MBB, MI, dl, TII->get(ARM::tADDframe), NewVReg5) in SetupEntryBlockForSjLj()
10439 .addReg(NewVReg5, RegState::Kill) in SetupEntryBlockForSjLj()
10692 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10693 BuildMI(DispContBB, dl, TII->get(ARM::tLDRi), NewVReg5) in EmitSjLjDispatchBlock()
10699 unsigned NewVReg6 = NewVReg5; in EmitSjLjDispatchBlock()
10704 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
10784 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10785 BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg5) in EmitSjLjDispatchBlock()
10794 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp10433 Register NewVReg5 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj() local
10434 BuildMI(*MBB, MI, dl, TII->get(ARM::tADDframe), NewVReg5) in SetupEntryBlockForSjLj()
10439 .addReg(NewVReg5, RegState::Kill) in SetupEntryBlockForSjLj()
10692 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10693 BuildMI(DispContBB, dl, TII->get(ARM::tLDRi), NewVReg5) in EmitSjLjDispatchBlock()
10699 unsigned NewVReg6 = NewVReg5; in EmitSjLjDispatchBlock()
10704 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
10784 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10785 BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg5) in EmitSjLjDispatchBlock()
10794 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp10433 Register NewVReg5 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj() local
10434 BuildMI(*MBB, MI, dl, TII->get(ARM::tADDframe), NewVReg5) in SetupEntryBlockForSjLj()
10439 .addReg(NewVReg5, RegState::Kill) in SetupEntryBlockForSjLj()
10692 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10693 BuildMI(DispContBB, dl, TII->get(ARM::tLDRi), NewVReg5) in EmitSjLjDispatchBlock()
10699 unsigned NewVReg6 = NewVReg5; in EmitSjLjDispatchBlock()
10704 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
10784 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10785 BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg5) in EmitSjLjDispatchBlock()
10794 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp10512 Register NewVReg5 = MRI->createVirtualRegister(TRC); in SetupEntryBlockForSjLj() local
10513 BuildMI(*MBB, MI, dl, TII->get(ARM::tADDframe), NewVReg5) in SetupEntryBlockForSjLj()
10518 .addReg(NewVReg5, RegState::Kill) in SetupEntryBlockForSjLj()
10771 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10772 BuildMI(DispContBB, dl, TII->get(ARM::tLDRi), NewVReg5) in EmitSjLjDispatchBlock()
10778 unsigned NewVReg6 = NewVReg5; in EmitSjLjDispatchBlock()
10783 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
10863 Register NewVReg5 = MRI->createVirtualRegister(TRC); in EmitSjLjDispatchBlock() local
10864 BuildMI(DispContBB, dl, TII->get(ARM::LDRrs), NewVReg5) in EmitSjLjDispatchBlock()
10873 .addReg(NewVReg5, RegState::Kill) in EmitSjLjDispatchBlock()
[all …]