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Searched refs:OP_SI (Results 1 – 10 of 10) sorted by relevance

/dports/lang/gnatdroid-binutils-x86/binutils-2.27/opcodes/
H A Dtic80-opc.c507 #define OP_SI(x) (((x) & 0x7F) << 15) macro
508 #define MASK_SI OP_SI(0x7F)
598 {"nop", OP_SI(0x4), ~0, 0, {0} },
603 {"br", OP_SI(0x48), 0xFFFF8000, 0, {OFF_SS_PC} },
606 {"br.a", OP_SI(0x49), 0xFFFF8000, 0, {OFF_SS_PC} },
612 {"add", OP_SI(0x58), MASK_SI, 0, {SSI, REG_22, REG_DEST} },
624 {"and", OP_SI(0x11), MASK_SI, 0, {SUBF, REG_22, REG_DEST} },
687 {"brcr", OP_SI(0x6), MASK_SI, 0, {CR_SI} },
693 {"bsr", OP_SI(0x40), MASK_SI, 0, {OFF_SS_PC, REG_DEST} },
705 {"cmnd", OP_SI(0x2), MASK_SI, 0, {SUI} },
[all …]
/dports/lang/gnatdroid-binutils/binutils-2.27/opcodes/
H A Dtic80-opc.c507 #define OP_SI(x) (((x) & 0x7F) << 15) macro
508 #define MASK_SI OP_SI(0x7F)
598 {"nop", OP_SI(0x4), ~0, 0, {0} },
603 {"br", OP_SI(0x48), 0xFFFF8000, 0, {OFF_SS_PC} },
606 {"br.a", OP_SI(0x49), 0xFFFF8000, 0, {OFF_SS_PC} },
612 {"add", OP_SI(0x58), MASK_SI, 0, {SSI, REG_22, REG_DEST} },
624 {"and", OP_SI(0x11), MASK_SI, 0, {SUBF, REG_22, REG_DEST} },
687 {"brcr", OP_SI(0x6), MASK_SI, 0, {CR_SI} },
693 {"bsr", OP_SI(0x40), MASK_SI, 0, {OFF_SS_PC, REG_DEST} },
705 {"cmnd", OP_SI(0x2), MASK_SI, 0, {SUI} },
[all …]
/dports/devel/zpu-gcc/zpu-toolchain-1.0/toolchain/binutils/opcodes/
H A Dtic80-opc.c512 #define OP_SI(x) (((x) & 0x7F) << 15) macro
513 #define MASK_SI OP_SI(0x7F)
603 {"nop", OP_SI(0x4), ~0, 0, {0} },
608 {"br", OP_SI(0x48), 0xFFFF8000, 0, {OFF_SS_PC} },
611 {"br.a", OP_SI(0x49), 0xFFFF8000, 0, {OFF_SS_PC} },
617 {"add", OP_SI(0x58), MASK_SI, 0, {SSI, REG_22, REG_DEST} },
629 {"and", OP_SI(0x11), MASK_SI, 0, {SUBF, REG_22, REG_DEST} },
692 {"brcr", OP_SI(0x6), MASK_SI, 0, {CR_SI} },
698 {"bsr", OP_SI(0x40), MASK_SI, 0, {OFF_SS_PC, REG_DEST} },
710 {"cmnd", OP_SI(0x2), MASK_SI, 0, {SUI} },
[all …]
/dports/devel/avr-gdb/gdb-7.3.1/opcodes/
H A Dtic80-opc.c512 #define OP_SI(x) (((x) & 0x7F) << 15) macro
513 #define MASK_SI OP_SI(0x7F)
603 {"nop", OP_SI(0x4), ~0, 0, {0} },
608 {"br", OP_SI(0x48), 0xFFFF8000, 0, {OFF_SS_PC} },
611 {"br.a", OP_SI(0x49), 0xFFFF8000, 0, {OFF_SS_PC} },
617 {"add", OP_SI(0x58), MASK_SI, 0, {SSI, REG_22, REG_DEST} },
629 {"and", OP_SI(0x11), MASK_SI, 0, {SUBF, REG_22, REG_DEST} },
692 {"brcr", OP_SI(0x6), MASK_SI, 0, {CR_SI} },
698 {"bsr", OP_SI(0x40), MASK_SI, 0, {OFF_SS_PC, REG_DEST} },
710 {"cmnd", OP_SI(0x2), MASK_SI, 0, {SUI} },
[all …]
/dports/devel/gdb761/gdb-7.6.1/opcodes/
H A Dtic80-opc.c513 #define OP_SI(x) (((x) & 0x7F) << 15) macro
514 #define MASK_SI OP_SI(0x7F)
604 {"nop", OP_SI(0x4), ~0, 0, {0} },
609 {"br", OP_SI(0x48), 0xFFFF8000, 0, {OFF_SS_PC} },
612 {"br.a", OP_SI(0x49), 0xFFFF8000, 0, {OFF_SS_PC} },
618 {"add", OP_SI(0x58), MASK_SI, 0, {SSI, REG_22, REG_DEST} },
630 {"and", OP_SI(0x11), MASK_SI, 0, {SUBF, REG_22, REG_DEST} },
693 {"brcr", OP_SI(0x6), MASK_SI, 0, {CR_SI} },
699 {"bsr", OP_SI(0x40), MASK_SI, 0, {OFF_SS_PC, REG_DEST} },
711 {"cmnd", OP_SI(0x2), MASK_SI, 0, {SUI} },
[all …]
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/opcodes/
H A Dtic80-opc.c512 #define OP_SI(x) (((x) & 0x7F) << 15) macro
513 #define MASK_SI OP_SI(0x7F)
603 {"nop", OP_SI(0x4), ~0, 0, {0} },
608 {"br", OP_SI(0x48), 0xFFFF8000, 0, {OFF_SS_PC} },
611 {"br.a", OP_SI(0x49), 0xFFFF8000, 0, {OFF_SS_PC} },
617 {"add", OP_SI(0x58), MASK_SI, 0, {SSI, REG_22, REG_DEST} },
629 {"and", OP_SI(0x11), MASK_SI, 0, {SUBF, REG_22, REG_DEST} },
692 {"brcr", OP_SI(0x6), MASK_SI, 0, {CR_SI} },
698 {"bsr", OP_SI(0x40), MASK_SI, 0, {OFF_SS_PC, REG_DEST} },
710 {"cmnd", OP_SI(0x2), MASK_SI, 0, {SUI} },
[all …]
/dports/devel/zpu-binutils/zpu-toolchain-1.0/toolchain/binutils/opcodes/
H A Dtic80-opc.c512 #define OP_SI(x) (((x) & 0x7F) << 15) macro
513 #define MASK_SI OP_SI(0x7F)
603 {"nop", OP_SI(0x4), ~0, 0, {0} },
608 {"br", OP_SI(0x48), 0xFFFF8000, 0, {OFF_SS_PC} },
611 {"br.a", OP_SI(0x49), 0xFFFF8000, 0, {OFF_SS_PC} },
617 {"add", OP_SI(0x58), MASK_SI, 0, {SSI, REG_22, REG_DEST} },
629 {"and", OP_SI(0x11), MASK_SI, 0, {SUBF, REG_22, REG_DEST} },
692 {"brcr", OP_SI(0x6), MASK_SI, 0, {CR_SI} },
698 {"bsr", OP_SI(0x40), MASK_SI, 0, {OFF_SS_PC, REG_DEST} },
710 {"cmnd", OP_SI(0x2), MASK_SI, 0, {SUI} },
[all …]
/dports/devel/djgpp-binutils/binutils-2.17/opcodes/
H A Dtic80-opc.c512 #define OP_SI(x) (((x) & 0x7F) << 15) macro
513 #define MASK_SI OP_SI(0x7F)
603 {"nop", OP_SI(0x4), ~0, 0, {0} },
608 {"br", OP_SI(0x48), 0xFFFF8000, 0, {OFF_SS_PC} },
611 {"br.a", OP_SI(0x49), 0xFFFF8000, 0, {OFF_SS_PC} },
617 {"add", OP_SI(0x58), MASK_SI, 0, {SSI, REG_22, REG_DEST} },
629 {"and", OP_SI(0x11), MASK_SI, 0, {SUBF, REG_22, REG_DEST} },
692 {"brcr", OP_SI(0x6), MASK_SI, 0, {CR_SI} },
698 {"bsr", OP_SI(0x40), MASK_SI, 0, {OFF_SS_PC, REG_DEST} },
710 {"cmnd", OP_SI(0x2), MASK_SI, 0, {SUI} },
[all …]
/dports/x11-toolkits/qt5-declarative-test/kde-qtdeclarative-5.15.2p41/src/3rdparty/masm/disassembler/udis86/
H A Dudis86_decode.h114 OP_SI, OP_DI, OP_SP, OP_BP, enumerator
/dports/x11-toolkits/qt5-declarative/kde-qtdeclarative-5.15.2p41/src/3rdparty/masm/disassembler/udis86/
H A Dudis86_decode.h114 OP_SI, OP_DI, OP_SP, OP_BP, enumerator