Home
last modified time | relevance | path

Searched refs:OSMR0 (Results 1 – 25 of 160) sorted by relevance

1234567

/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/clocksource/
H A Dtimer-pxa.c26 #define OSMR0 0x00 /* OS Timer 0 Match Register */ macro
85 timer_writel(next, OSMR0); in pxa_osmr0_set_next_event()
104 osmr[0] = timer_readl(OSMR0); in pxa_timer_suspend()
123 timer_writel(osmr[0], OSMR0); in pxa_timer_resume()
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/clocksource/
H A Dtimer-pxa.c26 #define OSMR0 0x00 /* OS Timer 0 Match Register */ macro
85 timer_writel(next, OSMR0); in pxa_osmr0_set_next_event()
104 osmr[0] = timer_readl(OSMR0); in pxa_timer_suspend()
123 timer_writel(osmr[0], OSMR0); in pxa_timer_resume()
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/clocksource/
H A Dtimer-pxa.c26 #define OSMR0 0x00 /* OS Timer 0 Match Register */ macro
85 timer_writel(next, OSMR0); in pxa_osmr0_set_next_event()
104 osmr[0] = timer_readl(OSMR0); in pxa_timer_suspend()
123 timer_writel(osmr[0], OSMR0); in pxa_timer_resume()
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/
H A Dregs-ost.h11 #define OSMR0 io_p2v(0x40A00000) /* */ macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/
H A Dregs-ost.h11 #define OSMR0 io_p2v(0x40A00000) /* */ macro
/dports/multimedia/libv4l/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/
H A Dregs-ost.h11 #define OSMR0 io_p2v(0x40A00000) /* */ macro
/dports/devel/openwince-include/include-0.4.2/arm/pxa2x0/
H A Dost.h78 #define OSMR0 OSMR(0) macro
/dports/emulators/qemu42/qemu-4.2.1/hw/timer/
H A Dpxa2xx_timer.c21 #define OSMR0 0x00 macro
175 case OSMR0: in pxa2xx_timer_read()
285 case OSMR0: in pxa2xx_timer_write()
/dports/emulators/qemu/qemu-6.2.0/hw/timer/
H A Dpxa2xx_timer.c22 #define OSMR0 0x00 macro
175 case OSMR0: in pxa2xx_timer_read()
285 case OSMR0: in pxa2xx_timer_write()
/dports/emulators/qemu60/qemu-6.0.0/hw/timer/
H A Dpxa2xx_timer.c22 #define OSMR0 0x00 macro
175 case OSMR0: in pxa2xx_timer_read()
285 case OSMR0: in pxa2xx_timer_write()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/timer/
H A Dpxa2xx_timer.c18 #define OSMR0 0x00 macro
172 case OSMR0: in pxa2xx_timer_read()
282 case OSMR0: in pxa2xx_timer_write()
/dports/emulators/qemu5/qemu-5.2.0/hw/timer/
H A Dpxa2xx_timer.c22 #define OSMR0 0x00 macro
175 case OSMR0: in pxa2xx_timer_read()
285 case OSMR0: in pxa2xx_timer_write()
/dports/emulators/qemu-utils/qemu-4.2.1/hw/timer/
H A Dpxa2xx_timer.c21 #define OSMR0 0x00 macro
175 case OSMR0: in pxa2xx_timer_read()
285 case OSMR0: in pxa2xx_timer_write()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/timer/
H A Dpxa2xx_timer.c21 #define OSMR0 0x00 macro
175 case OSMR0: in pxa2xx_timer_read()
285 case OSMR0: in pxa2xx_timer_write()
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/timer/
H A Dpxa2xx_timer.c22 #define OSMR0 0x00 macro
175 case OSMR0: in pxa2xx_timer_read()
285 case OSMR0: in pxa2xx_timer_write()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/timer/
H A Dpxa2xx_timer.c21 #define OSMR0 0x00 macro
175 case OSMR0: in pxa2xx_timer_read()
285 case OSMR0: in pxa2xx_timer_write()
/dports/devel/codeblocks/codeblocks-20.03/src/plugins/scriptedwizard/resources/arm/files/phyCORE-PXA255/h/
H A Dpxa255regs.h644 #define OSMR0 __REG(OST_BASE+0x00) /* OS Timer Match Register 0 */ macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h834 #define OSMR0 io_p2v(0x90000000) /* OS timer Match Reg. 0 */ macro
/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h834 #define OSMR0 io_p2v(0x90000000) /* OS timer Match Reg. 0 */ macro
/dports/multimedia/libv4l/linux-5.13-rc2/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h834 #define OSMR0 io_p2v(0x90000000) /* OS timer Match Reg. 0 */ macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h919 #define OSMR0 0x40A00000 /* OS Timer Match Register 0 */ macro
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h919 #define OSMR0 0x40A00000 /* OS Timer Match Register 0 */ macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h919 #define OSMR0 0x40A00000 /* OS Timer Match Register 0 */ macro
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h919 #define OSMR0 0x40A00000 /* OS Timer Match Register 0 */ macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h919 #define OSMR0 0x40A00000 /* OS Timer Match Register 0 */ macro

1234567