/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/clocksource/ |
H A D | timer-pxa.c | 26 #define OSMR0 0x00 /* OS Timer 0 Match Register */ macro 85 timer_writel(next, OSMR0); in pxa_osmr0_set_next_event() 104 osmr[0] = timer_readl(OSMR0); in pxa_timer_suspend() 123 timer_writel(osmr[0], OSMR0); in pxa_timer_resume()
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/clocksource/ |
H A D | timer-pxa.c | 26 #define OSMR0 0x00 /* OS Timer 0 Match Register */ macro 85 timer_writel(next, OSMR0); in pxa_osmr0_set_next_event() 104 osmr[0] = timer_readl(OSMR0); in pxa_timer_suspend() 123 timer_writel(osmr[0], OSMR0); in pxa_timer_resume()
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/clocksource/ |
H A D | timer-pxa.c | 26 #define OSMR0 0x00 /* OS Timer 0 Match Register */ macro 85 timer_writel(next, OSMR0); in pxa_osmr0_set_next_event() 104 osmr[0] = timer_readl(OSMR0); in pxa_timer_suspend() 123 timer_writel(osmr[0], OSMR0); in pxa_timer_resume()
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/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/ |
H A D | regs-ost.h | 11 #define OSMR0 io_p2v(0x40A00000) /* */ macro
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/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/ |
H A D | regs-ost.h | 11 #define OSMR0 io_p2v(0x40A00000) /* */ macro
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/dports/multimedia/libv4l/linux-5.13-rc2/arch/arm/mach-pxa/include/mach/ |
H A D | regs-ost.h | 11 #define OSMR0 io_p2v(0x40A00000) /* */ macro
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/dports/devel/openwince-include/include-0.4.2/arm/pxa2x0/ |
H A D | ost.h | 78 #define OSMR0 OSMR(0) macro
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/dports/emulators/qemu42/qemu-4.2.1/hw/timer/ |
H A D | pxa2xx_timer.c | 21 #define OSMR0 0x00 macro 175 case OSMR0: in pxa2xx_timer_read() 285 case OSMR0: in pxa2xx_timer_write()
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/dports/emulators/qemu/qemu-6.2.0/hw/timer/ |
H A D | pxa2xx_timer.c | 22 #define OSMR0 0x00 macro 175 case OSMR0: in pxa2xx_timer_read() 285 case OSMR0: in pxa2xx_timer_write()
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/dports/emulators/qemu60/qemu-6.0.0/hw/timer/ |
H A D | pxa2xx_timer.c | 22 #define OSMR0 0x00 macro 175 case OSMR0: in pxa2xx_timer_read() 285 case OSMR0: in pxa2xx_timer_write()
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/hw/timer/ |
H A D | pxa2xx_timer.c | 18 #define OSMR0 0x00 macro 172 case OSMR0: in pxa2xx_timer_read() 282 case OSMR0: in pxa2xx_timer_write()
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/dports/emulators/qemu5/qemu-5.2.0/hw/timer/ |
H A D | pxa2xx_timer.c | 22 #define OSMR0 0x00 macro 175 case OSMR0: in pxa2xx_timer_read() 285 case OSMR0: in pxa2xx_timer_write()
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/dports/emulators/qemu-utils/qemu-4.2.1/hw/timer/ |
H A D | pxa2xx_timer.c | 21 #define OSMR0 0x00 macro 175 case OSMR0: in pxa2xx_timer_read() 285 case OSMR0: in pxa2xx_timer_write()
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/hw/timer/ |
H A D | pxa2xx_timer.c | 21 #define OSMR0 0x00 macro 175 case OSMR0: in pxa2xx_timer_read() 285 case OSMR0: in pxa2xx_timer_write()
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/hw/timer/ |
H A D | pxa2xx_timer.c | 22 #define OSMR0 0x00 macro 175 case OSMR0: in pxa2xx_timer_read() 285 case OSMR0: in pxa2xx_timer_write()
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/hw/timer/ |
H A D | pxa2xx_timer.c | 21 #define OSMR0 0x00 macro 175 case OSMR0: in pxa2xx_timer_read() 285 case OSMR0: in pxa2xx_timer_write()
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/dports/devel/codeblocks/codeblocks-20.03/src/plugins/scriptedwizard/resources/arm/files/phyCORE-PXA255/h/ |
H A D | pxa255regs.h | 644 #define OSMR0 __REG(OST_BASE+0x00) /* OS Timer Match Register 0 */ macro
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/dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm/mach-sa1100/include/mach/ |
H A D | SA-1100.h | 834 #define OSMR0 io_p2v(0x90000000) /* OS timer Match Reg. 0 */ macro
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/dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm/mach-sa1100/include/mach/ |
H A D | SA-1100.h | 834 #define OSMR0 io_p2v(0x90000000) /* OS timer Match Reg. 0 */ macro
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/dports/multimedia/libv4l/linux-5.13-rc2/arch/arm/mach-sa1100/include/mach/ |
H A D | SA-1100.h | 834 #define OSMR0 io_p2v(0x90000000) /* OS timer Match Reg. 0 */ macro
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/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-pxa/ |
H A D | pxa-regs.h | 919 #define OSMR0 0x40A00000 /* OS Timer Match Register 0 */ macro
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/dports/emulators/qemu/qemu-6.2.0/roms/u-boot/arch/arm/include/asm/arch-pxa/ |
H A D | pxa-regs.h | 919 #define OSMR0 0x40A00000 /* OS Timer Match Register 0 */ macro
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/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/include/asm/arch-pxa/ |
H A D | pxa-regs.h | 919 #define OSMR0 0x40A00000 /* OS Timer Match Register 0 */ macro
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/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
H A D | pxa-regs.h | 919 #define OSMR0 0x40A00000 /* OS Timer Match Register 0 */ macro
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/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/include/asm/arch-pxa/ |
H A D | pxa-regs.h | 919 #define OSMR0 0x40A00000 /* OS Timer Match Register 0 */ macro
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