1 /*
2  * $Id: ost.h,v 1.10 2005/09/29 08:51:07 telka Exp $
3  *
4  * XScale PXA26x/PXA255/PXA250/PXA210 OS Timer Registers
5  * Copyright (C) 2002, 2003 ETC s.r.o.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. Neither the name of the ETC s.r.o. nor the names of its contributors
17  *    may be used to endorse or promote products derived from this software
18  *    without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
24  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
26  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
27  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
28  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
29  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  *
31  * Written by Marcel Telka <marcel@telka.sk>, 2002, 2003.
32  *
33  * Documentation:
34  * [1] Intel Corporation, "Intel PXA250 and PXA210 Application Processors
35  *     Developer's Manual", February 2002, Order Number: 278522-001
36  * [2] Intel Corporation, "Intel PXA26x Processor Family Developer's Manual",
37  *     March 2003, Order Number: 278638-002
38  * [3] Intel Corporation, "Intel PXA255 Processor Developer's Manual"
39  *     March 2003, Order Number: 278693-001
40  *
41  */
42 
43 #ifndef	PXA2X0_OST_H
44 #define	PXA2X0_OST_H
45 
46 #include <openwince.h>
47 
48 #if LANGUAGE == C
49 #include <stdint.h>
50 #endif
51 
52 #if defined(PXA2X0_NOPXA250) && !defined(PXA2X0_NOPXA255)
53 #define PXA2X0_NOPXA255
54 #endif
55 
56 #if defined(PXA2X0_NOPXA255) && !defined(PXA2X0_NOPXA260)
57 #define PXA2X0_NOPXA260
58 #endif
59 
60 /* OS Timer Registers */
61 
62 #define	OST_BASE	0x40A00000
63 
64 #if LANGUAGE == C
65 typedef volatile struct OST_registers {
66 	uint32_t osmr[4];
67 	uint32_t oscr;
68 	uint32_t ossr;
69 	uint32_t ower;
70 	uint32_t oier;
71 } OST_registers_t;
72 
73 #ifdef PXA2X0_UNMAPPED
74 #define	OST_pointer	((OST_registers_t*) OST_BASE)
75 #endif
76 
77 #define	OSMR(i)		OST_pointer->osmr[i]
78 #define	OSMR0		OSMR(0)
79 #define	OSMR1		OSMR(1)
80 #define	OSMR2		OSMR(2)
81 #define	OSMR3		OSMR(3)
82 #define	OSCR		OST_pointer->oscr
83 #define	OSSR		OST_pointer->ossr
84 #define	OWER		OST_pointer->ower
85 #define	OIER		OST_pointer->oier
86 #endif /* LANGUAGE == C */
87 
88 #define	OSMR0_OFFSET	0x00
89 #define	OSMR1_OFFSET	0x04
90 #define	OSMR2_OFFSET	0x08
91 #define	OSMR3_OFFSET	0x0C
92 #define	OSCR_OFFSET	0x10
93 #define	OSSR_OFFSET	0x14
94 #define	OWER_OFFSET	0x18
95 #define	OIER_OFFSET	0x1C
96 
97 /* OSSR bits - see 4.4.2.5 in [1], Table 4-48 in [2], Table 4-45 in [3] */
98 
99 #define	OSSR_M3		bit(3)
100 #define	OSSR_M2		bit(2)
101 #define	OSSR_M1		bit(1)
102 #define	OSSR_M0		bit(0)
103 
104 /* OWER bits - see Table 4-46 in [1], Table 4-46 in [2], Table 4-43 in [3] */
105 
106 #define	OWER_WME	bit(0)
107 
108 /* OIER bits - see Table 4-45 in [1], Table 4-45 in [2], Table 4-42 in [3] */
109 
110 #define	OIER_E3		bit(3)
111 #define	OIER_E2		bit(2)
112 #define	OIER_E1		bit(1)
113 #define	OIER_E0		bit(0)
114 
115 #endif /* PXA2X0_OST_H */
116