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Searched refs:PB1CR (Results 1 – 25 of 65) sorted by relevance

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/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/esd/cpci405/
H A Dflash.c95 mtdcr (EBC0_CFGADDR, PB1CR); in flash_init()
97 mtdcr (EBC0_CFGADDR, PB1CR); in flash_init()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/amcc/walnut/
H A Dflash.c101 mtdcr(EBC0_CFGADDR, PB1CR); in flash_init()
103 mtdcr(EBC0_CFGADDR, PB1CR); in flash_init()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/amcc/bubinga/
H A Dflash.c104 mtdcr(EBC0_CFGADDR, PB1CR); in flash_init()
106 mtdcr(EBC0_CFGADDR, PB1CR); in flash_init()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/mpl/common/
H A Dcommon_util.c101 mtdcr(EBC0_CFGADDR, PB1CR); in setup_cs_reloc()
107 mtdcr(EBC0_CFGADDR, PB1CR); in setup_cs_reloc()
143 mtdcr(EBC0_CFGADDR, PB1CR); in update_flash_size()
149 mtdcr(EBC0_CFGADDR, PB1CR); in update_flash_size()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/amcc/redwood/
H A Dredwood.c225 mtebc(PB1CR, EBC_BXCR_FPGA_CS3); in early_init_EBC()
389 mtebc(PB1CR, ebc0_cs1_bxcr_value); in early_reinit_EBC()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/amcc/acadia/
H A Dmemory.c58 mtebc(PB1CR, 0x000BC000); in initdram()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/amcc/ebony/
H A Debony.c33 mtebc(PB1CR, 0x48018000); /* BA=0x480 1MB R/W 8-bit */ in board_early_init_f()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/amcc/luan/
H A Dluan.c32 mtebc( PB1CR, 0xff018000 ); /* ebc0_b1cr, 1MB at 0xff000000 CS1 */ in board_early_init_f()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/xes/xpedite1000/
H A Dxpedite1000.c41 mtebc(PB1CR, 0xfe018000); /* BAS=0xfe0 1MB R/W 8-bit */ in board_early_init_f()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/prodrive/p3p440/
H A Dp3p440.c141 mtebc(PB1CR, 0); /* disable cs */ in misc_init_r()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/csb472/
H A Dinit.S117 WDCR_EBC(PB1CR, 0)
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/csb272/
H A Dinit.S110 WDCR_EBC(PB1CR, 0xf0818000)
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/amcc/taishan/
H A Dtaishan.c63 mtebc(PB1CR, EBC_BXCR_BAS_ENCODE(0x41000000) | in board_early_init_f()
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/mpl/mip405/
H A Dmip405.c279 mtdcr (EBC0_CFGADDR, PB1CR); in init_sdram()
285 mtdcr (EBC0_CFGADDR, PB1CR); in init_sdram()
H A Dinit.S117 addi r4,0,PB1CR
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/arch/powerpc/include/asm/
H A Dppc4xx.h123 #define PB1CR 0x01 /* periph bank 1 config reg */ macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/powerpc/include/asm/
H A Dppc4xx.h123 #define PB1CR 0x01 /* periph bank 1 config reg */ macro
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/powerpc/include/asm/
H A Dppc4xx.h123 #define PB1CR 0x01 /* periph bank 1 config reg */ macro
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/powerpc/include/asm/
H A Dppc4xx.h123 #define PB1CR 0x01 /* periph bank 1 config reg */ macro
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/arch/powerpc/include/asm/
H A Dppc4xx.h123 #define PB1CR 0x01 /* periph bank 1 config reg */ macro
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/arch/powerpc/include/asm/
H A Dppc4xx.h123 #define PB1CR 0x01 /* periph bank 1 config reg */ macro
/dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/powerpc/include/asm/
H A Dppc4xx.h89 #define PB1CR 0x01 /* periph bank 1 config reg */ macro
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/mpl/pip405/
H A Dinit.S114 addi r4,0,PB1CR
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/arch/powerpc/include/asm/
H A Dppc4xx.h123 #define PB1CR 0x01 /* periph bank 1 config reg */ macro
/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/amcc/ocotea/
H A Docotea.c102 mtebc(PB1CR, EBC_BXCR_BAS_ENCODE(0x48000000)| in board_early_init_f()

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