| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f4xx/ |
| H A D | system_stm32f4xx.c | 157 #define PLL_N (F_CPU * 12LL / F_CRYSTAL) macro
160 #define PLL_N (F_CPU / 500000) macro
398 RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) -1) << 16) | in SetSysClock()
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| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f4xx/ |
| H A D | system_stm32f4xx.c | 157 #define PLL_N (F_CPU * 12LL / F_CRYSTAL) macro
160 #define PLL_N (F_CPU / 500000) macro
398 RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) -1) << 16) | in SetSysClock()
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| /dports/audio/codec2/codec2-1.0.3/stm32/src/ |
| H A D | system_stm32f4xx.c | 157 #define PLL_N 336 macro
396 RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) -1) << 16) | in SetSysClock()
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| /dports/devel/tinygo/tinygo-0.14.1/src/runtime/ |
| H A D | runtime_stm32f407.go | 28 PLL_N = 336 const
87 stm32.RCC.PLLCFGR.Set(PLL_M | (PLL_N << 6) | (((PLL_P >> 1) - 1) << 16) |
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/clk/sprd/ |
| H A D | pll.h | 30 PLL_N, enumerator
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| H A D | pll.c | 125 rate = refin * pinternal_val(pll, cfg, PLL_N) * CLK_PLL_10M; in _sprd_pll_recalc_rate()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/clk/sprd/ |
| H A D | pll.h | 30 PLL_N, enumerator
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| H A D | pll.c | 125 rate = refin * pinternal_val(pll, cfg, PLL_N) * CLK_PLL_10M; in _sprd_pll_recalc_rate()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/clk/sprd/ |
| H A D | pll.h | 30 PLL_N, enumerator
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| H A D | pll.c | 125 rate = refin * pinternal_val(pll, cfg, PLL_N) * CLK_PLL_10M; in _sprd_pll_recalc_rate()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/media/i2c/ |
| H A D | rj54n1cb0c.c | 108 #define PLL_N 0x31 macro
834 ret = reg_write(client, RJ54N1_PLL_N, PLL_N); in rj54n1_set_clock()
1348 rj54n1->tgclk_mhz = (rj54n1_priv->mclk_freq / PLL_L * PLL_N) / in rj54n1_probe()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/media/i2c/ |
| H A D | rj54n1cb0c.c | 108 #define PLL_N 0x31 macro
834 ret = reg_write(client, RJ54N1_PLL_N, PLL_N); in rj54n1_set_clock()
1348 rj54n1->tgclk_mhz = (rj54n1_priv->mclk_freq / PLL_L * PLL_N) / in rj54n1_probe()
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/media/i2c/ |
| H A D | rj54n1cb0c.c | 108 #define PLL_N 0x31 macro
834 ret = reg_write(client, RJ54N1_PLL_N, PLL_N); in rj54n1_set_clock()
1348 rj54n1->tgclk_mhz = (rj54n1_priv->mclk_freq / PLL_L * PLL_N) / in rj54n1_probe()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/video/fbdev/ |
| H A D | gxt4500.c | 101 #define PLL_N 0x4044 macro
410 writereg(par, PLL_N, ndivtab[par->pll_n - 2]); in gxt4500_set_par()
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| /dports/multimedia/libv4l/linux-5.13-rc2/drivers/video/fbdev/ |
| H A D | gxt4500.c | 101 #define PLL_N 0x4044 macro
410 writereg(par, PLL_N, ndivtab[par->pll_n - 2]); in gxt4500_set_par()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/video/fbdev/ |
| H A D | gxt4500.c | 101 #define PLL_N 0x4044 macro
410 writereg(par, PLL_N, ndivtab[par->pll_n - 2]); in gxt4500_set_par()
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