| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/sh/kernel/cpu/sh4/ |
| H A D | perf_event.c | 17 #define PMCR(n) (PM_CR_BASE + ((n) * 0x04)) macro
212 tmp = __raw_readw(PMCR(idx)); in sh7750_pmu_disable()
214 __raw_writew(tmp, PMCR(idx)); in sh7750_pmu_disable()
219 __raw_writew(__raw_readw(PMCR(idx)) | PMCR_PMCLR, PMCR(idx)); in sh7750_pmu_enable()
220 __raw_writew(hwc->config | PMCR_PMEN | PMCR_PMST, PMCR(idx)); in sh7750_pmu_enable()
228 __raw_writew(__raw_readw(PMCR(i)) & ~PMCR_PMEN, PMCR(i)); in sh7750_pmu_disable_all()
236 __raw_writew(__raw_readw(PMCR(i)) | PMCR_PMEN, PMCR(i)); in sh7750_pmu_enable_all()
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/sh/kernel/cpu/sh4/ |
| H A D | perf_event.c | 17 #define PMCR(n) (PM_CR_BASE + ((n) * 0x04)) macro
212 tmp = __raw_readw(PMCR(idx)); in sh7750_pmu_disable()
214 __raw_writew(tmp, PMCR(idx)); in sh7750_pmu_disable()
219 __raw_writew(__raw_readw(PMCR(idx)) | PMCR_PMCLR, PMCR(idx)); in sh7750_pmu_enable()
220 __raw_writew(hwc->config | PMCR_PMEN | PMCR_PMST, PMCR(idx)); in sh7750_pmu_enable()
228 __raw_writew(__raw_readw(PMCR(i)) & ~PMCR_PMEN, PMCR(i)); in sh7750_pmu_disable_all()
236 __raw_writew(__raw_readw(PMCR(i)) | PMCR_PMEN, PMCR(i)); in sh7750_pmu_enable_all()
|
| /dports/multimedia/libv4l/linux-5.13-rc2/arch/sh/kernel/cpu/sh4/ |
| H A D | perf_event.c | 17 #define PMCR(n) (PM_CR_BASE + ((n) * 0x04)) macro
212 tmp = __raw_readw(PMCR(idx)); in sh7750_pmu_disable()
214 __raw_writew(tmp, PMCR(idx)); in sh7750_pmu_disable()
219 __raw_writew(__raw_readw(PMCR(idx)) | PMCR_PMCLR, PMCR(idx)); in sh7750_pmu_enable()
220 __raw_writew(hwc->config | PMCR_PMEN | PMCR_PMST, PMCR(idx)); in sh7750_pmu_enable()
228 __raw_writew(__raw_readw(PMCR(i)) & ~PMCR_PMEN, PMCR(i)); in sh7750_pmu_disable_all()
236 __raw_writew(__raw_readw(PMCR(i)) | PMCR_PMEN, PMCR(i)); in sh7750_pmu_enable_all()
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/board/renesas/ecovec/ |
| H A D | ecovec.c | 75 outw(inw(PMCR) & ~0x0C, PMCR); in board_init()
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/board/renesas/ecovec/ |
| H A D | ecovec.c | 75 outw(inw(PMCR) & ~0x0C, PMCR); in board_init()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/board/renesas/ecovec/ |
| H A D | ecovec.c | 75 outw(inw(PMCR) & ~0x0C, PMCR); in board_init()
|
| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/board/renesas/ecovec/ |
| H A D | ecovec.c | 75 outw(inw(PMCR) & ~0x0C, PMCR); in board_init()
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/board/renesas/ecovec/ |
| H A D | ecovec.c | 75 outw(inw(PMCR) & ~0x0C, PMCR); in board_init()
|
| /dports/sysutils/u-boot-utilite/u-boot-2015.07/board/renesas/ecovec/ |
| H A D | ecovec.c | 86 outw(inw(PMCR) & ~0x0C, PMCR); in board_init()
|
| /dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/docs/perf/ |
| H A D | performance-monitoring-unit.rst | 50 ``PMCR`` registers. These can be accessed at all privilege levels.
64 | ``PMCR_EL0[63*:0]`` | ``PMCR[31:0]`` |
129 For ``PMCR``/``PMCR_EL0``, the most important fields are:
145 - The effects of ``PMCNTENSET`` and ``PMCR.DP`` are applied on top of this.
|
| /dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/docs/perf/ |
| H A D | performance-monitoring-unit.rst | 50 ``PMCR`` registers. These can be accessed at all privilege levels.
64 | ``PMCR_EL0[63*:0]`` | ``PMCR[31:0]`` |
129 For ``PMCR``/``PMCR_EL0``, the most important fields are:
145 - The effects of ``PMCNTENSET`` and ``PMCR.DP`` are applied on top of this.
|
| /dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/docs/perf/ |
| H A D | performance-monitoring-unit.rst | 50 ``PMCR`` registers. These can be accessed at all privilege levels.
64 | ``PMCR_EL0[63*:0]`` | ``PMCR[31:0]`` |
129 For ``PMCR``/``PMCR_EL0``, the most important fields are:
145 - The effects of ``PMCNTENSET`` and ``PMCR.DP`` are applied on top of this.
|
| /dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/docs/perf/ |
| H A D | performance-monitoring-unit.rst | 50 ``PMCR`` registers. These can be accessed at all privilege levels.
64 | ``PMCR_EL0[63*:0]`` | ``PMCR[31:0]`` |
129 For ``PMCR``/``PMCR_EL0``, the most important fields are:
145 - The effects of ``PMCNTENSET`` and ``PMCR.DP`` are applied on top of this.
|
| /dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/docs/perf/ |
| H A D | performance-monitoring-unit.rst | 50 ``PMCR`` registers. These can be accessed at all privilege levels.
64 | ``PMCR_EL0[63*:0]`` | ``PMCR[31:0]`` |
129 For ``PMCR``/``PMCR_EL0``, the most important fields are:
145 - The effects of ``PMCNTENSET`` and ``PMCR.DP`` are applied on top of this.
|
| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32H7xx_HAL_Driver/inc/ |
| H A D | stm32h7xx_ll_system.h | 400 MODIFY_REG(SYSCFG->PMCR, SYSCFG_PMCR_EPIS_SEL, Interface); in LL_SYSCFG_SetPHYInterface()
412 return (uint32_t)(READ_BIT(SYSCFG->PMCR, SYSCFG_PMCR_EPIS_SEL)); in LL_SYSCFG_GetPHYInterface()
430 SET_BIT(SYSCFG->PMCR, AnalogSwitch); in LL_SYSCFG_OpenAnalogSwitch()
448 CLEAR_BIT(SYSCFG->PMCR, AnalogSwitch); in LL_SYSCFG_CloseAnalogSwitch()
462 SET_BIT(SYSCFG->PMCR, SYSCFG_PMCR_BOOSTEN) ; in LL_SYSCFG_EnableAnalogBooster()
475 CLEAR_BIT(SYSCFG->PMCR, SYSCFG_PMCR_BOOSTEN) ; in LL_SYSCFG_DisableAnalogBooster()
497 SET_BIT(SYSCFG->PMCR, ConfigFastModePlus); in LL_SYSCFG_EnableFastModePlus()
518 CLEAR_BIT(SYSCFG->PMCR, ConfigFastModePlus); in LL_SYSCFG_DisableFastModePlus()
|
| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32H7xx_HAL_Driver/src/ |
| H A D | stm32h7xx_hal_i2c_ex.c | 290 SET_BIT(SYSCFG->PMCR, (uint32_t)ConfigFastModePlus); in HAL_I2CEx_EnableFastModePlus()
319 CLEAR_BIT(SYSCFG->PMCR, (uint32_t)ConfigFastModePlus); in HAL_I2CEx_DisableFastModePlus()
|
| H A D | stm32h7xx_hal.c | 597 MODIFY_REG(SYSCFG->PMCR, SYSCFG_PMCR_EPIS_SEL, (uint32_t)(SYSCFG_ETHInterface)); in HAL_SYSCFG_ETHInterfaceSelect()
628 MODIFY_REG(SYSCFG->PMCR, (uint32_t) SYSCFG_AnalogSwitch, (uint32_t)(SYSCFG_SwitchState)); in HAL_SYSCFG_AnalogSwitchConfig()
642 SET_BIT(SYSCFG->PMCR, SYSCFG_PMCR_BOOSTEN) ; in HAL_SYSCFG_EnableBOOST()
654 CLEAR_BIT(SYSCFG->PMCR, SYSCFG_PMCR_BOOSTEN) ; in HAL_SYSCFG_DisableBOOST()
|
| /dports/sysutils/atf-sun50i_h6/arm-trusted-firmware-2.5/include/arch/aarch32/ |
| H A D | smccc_macros.S | 101 ldcopr r5, PMCR
112 stcopr r5, PMCR
162 stcopr r1, PMCR
|
| /dports/sysutils/atf-sun50i_a64/arm-trusted-firmware-2.5/include/arch/aarch32/ |
| H A D | smccc_macros.S | 101 ldcopr r5, PMCR
112 stcopr r5, PMCR
162 stcopr r1, PMCR
|
| /dports/sysutils/atf-rk3328/arm-trusted-firmware-2.5/include/arch/aarch32/ |
| H A D | smccc_macros.S | 101 ldcopr r5, PMCR
112 stcopr r5, PMCR
162 stcopr r1, PMCR
|
| /dports/sysutils/atf-fvp/arm-trusted-firmware-2.5/include/arch/aarch32/ |
| H A D | smccc_macros.S | 101 ldcopr r5, PMCR
112 stcopr r5, PMCR
162 stcopr r1, PMCR
|
| /dports/sysutils/atf-rk3399/arm-trusted-firmware-2.5/include/arch/aarch32/ |
| H A D | smccc_macros.S | 101 ldcopr r5, PMCR
112 stcopr r5, PMCR
162 stcopr r1, PMCR
|
| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/arm/mach-sa1100/ |
| H A D | sleep.S | 110 ldr r12, =PMCR
139 @ Step 6 set force sleep bit in PMCR
|
| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/arm/mach-sa1100/ |
| H A D | sleep.S | 110 ldr r12, =PMCR
139 @ Step 6 set force sleep bit in PMCR
|
| /dports/multimedia/libv4l/linux-5.13-rc2/arch/arm/mach-sa1100/ |
| H A D | sleep.S | 110 ldr r12, =PMCR
139 @ Step 6 set force sleep bit in PMCR
|